ISL6551IBZ datasheet(21/27 Pages) RENESAS

21 / 27 page

FN9066 Rev 7.00

Page 21 of 27

Oct 28, 2015

ISL6551

Full Bridge and Current Doubler- No center tap is required. The

secondary winding carries half of the load, i.e., only half of the

load is reflected to the primary.

Conventional Full Bridge- Center tap is required on the

secondary side and no center tap is required on the primary

side. The secondary winding carries all the load. i.e., all the

load is reflected to the primary.

Push-pull and Current Doubler- Center tap is required on the

primary side and no center tap is required on the secondary

side. The secondary winding carries half of the load, i.e., only

half of the load is reflected to the primary.

Conventional Push-pull- Both primary and secondary sides

require center taps. The secondary winding carries all the load,

i.e., all the load is reflected to the primary.

Supervisor Circuits

INTEGRATED SOLUTION

• Intersil ISL6550 Supervisor And Monitor (SAM). Its QFN

package requires less space than the SOIC package.

• Over-temperature protection (discrete)

•Input UV lockout (discrete)

DISCRETE SOLUTION

• Differential amplifier

• VCC undervoltage lockout

• Programmable output OV and UV

•Programmable output

• Status indicators (PGOOD and START)

• Precision reference

• Over-temperature protection

•Input UV lockout

Main Transformers

FIGURE 22A. FULL BRIDGE AND CURRENT DOUBLER

FIGURE 22B. CONVENTIONAL FULL BRIDGE

FIGURE 22C. PUSH-PULL AND CURRENT DOUBLER

FIGURE 22D. CONVENTIONAL PUSH-PULL

FIGURE 22. MAIN TRANSFORMERS

P+

P–

S +

S–

P+

P–

S +

VOUTF

S–

S +

VINF

S–

P1–

P2–

or CURRENT_SEN_P

S +

VOUTF

S–

VINF

P1–

P2–

or CURRENT_SEN_P

VCC

VOPP

VOPM

VOPOUT

VREF5

GND

OVUVTH

BDAC

DACHI

DACLO

UVDLY

PGOOD

START

PEN

OVUVSEN

VID0

VID1

VID2

VID3

VID4

PGOOD

START

PEN

BDAC

VREF5

VOPOUT

FIGURE 23. ISL6550 SOIC

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