LTC3709 datasheet(13/24 Pages) LINER

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LTC3709

3709f

APPLICATIO S I FOR ATIO

Figure 1. RDS(ON) vs Temperature

JUNCTION TEMPERATURE (°C)

–50

1.0

1.5

150

3709 F01

0.5

100

2.0

The power dissipated by the top and bottom MOSFETs

strongly depends upon their respective duty cycles and

the load current. When the LTC3709 is operating in

continuous mode, the duty cycles for the MOSFETs are:

TOP

OUT

BOT

OUT

–

The maximum power dissipation in the MOSFETs per

channel is:

DRV

TOP

OUT MAX

T TOP

DS ON MAX

OUT

RSS

DS ON DRV

GS TH

BOT

OUT MAX

TBOT

⎛

⎝

⎜

⎞

⎠

⎟

⎛

⎝

⎜

⎞

⎠

⎟

()

⎛

⎝

⎜

⎞

⎠

⎟

⎛

⎝

⎜

⎞

⎠

⎟

••

•

(. ) •

•

• •

–

••

()

(

)(

)

()_

()

••

()(

)

RDS ON MAX

Both top and bottom MOSFETs have I2R losses and the top

MOSFET includes an additional term for transition losses,

which are the largest at maximum input voltages. The

bottom MOSFET losses are the greatest when the bottom

duty cycle is near 100%, during a short circuit or at high

input voltage. A much smaller and much lower input

capacitance MOSFET should be used for the top MOSFET

in applications that have an output voltage that is less than

1/3 of the input voltage. In applications where VIN >> VOUT,

the top MOSFETs’ “on” resistance is normally less impor-

tant for overall efficiency than its input capacitance at

operating frequencies above 300kHz. MOSFET manufac-

turers have designed special purpose devices that provide

reasonably low “on” resistance with significantly reduced

input capacitance for the main switch application in switch-

ing regulators.

Operating Frequency

The choice of operating frequency is a tradeoff between

efficiency and component size. Low frequency operation

improves efficiency by reducing MOSFET switching losses

but requires larger inductance and/or capacitance to main-

tain low output ripple voltage.

The operating frequency of LTC3709 applications is deter-

mined implicitly by the one-shot timer that controls the on

time, tON, of the top MOSFET switch. The on-time is set by

the current into the ION pin according to:

ION

()

Tying a resistor from VIN to the ION pin yields an on-time

inversely proportional to VIN. For a down converter, this

results in approximately constant frequency operation as

the input supply varies:

RpF

OUT

()

.•

PLL and Frequency Synchronization

In the LTC3709, there are two on-chip phase-lock loops

(PLLs). One of the PLLs is used to achieve frequency

locking and phase separation between the two channels

while the second PLL is for locking onto an external clock.

Since the LTC3709 is a constant on-time architecture, the

error signal generated by the phase detector of the PLL is

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