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LM4947 Datasheet(PDF) 8 Page - National Semiconductor (TI) |
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LM4947 Datasheet(HTML) 8 Page - National Semiconductor (TI) |
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8 / 32 page ![]() I 2C (Notes 2, 7) The following specifications apply for V DD = 5V and 3.3V, TA = 25˚C unless otherwise specified. Symbol Parameter Conditions LM4947 Units (Limits) Typical (Note 4) Limits (Note 5) t 1 Clock Period 2.5 µs (max) t 2 Clock Setup Time 100 ns (min) t 3 Data Hold Time 100 ns (min) t 4 Start Condition Time 100 ns (min) t 5 Stop Condition Time 100 ns (min) V IH SPI Input Voltage High 0.7xI 2C V DD V (min) V IL SPI Input Voltage Low 0.3xI 2C V DD V (max) I 2C Protocol Information The I 2C address for the LM4947 is determined using the ID_ENB pin. The LM4947’s two possible I 2C chip addresses are of the form 111110X 10 (binary), where X 1 =0,if ID_ADDR is logic LOW; and X 1 = 1, if ID_ENB is logic HIGH. If the I 2C interface is used to address a number of chips in a system, the LM4947’s chip address can be changed to avoid any possible address conflicts. 201735F5 FIGURE 3. I 2C Bus Format 201735F4 FIGURE 4. I 2C Timing Diagram www.national.com 8 |
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