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MPC603EC Datasheet(PDF) 4 Page - NXP Semiconductors |
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MPC603EC Datasheet(HTML) 4 Page - NXP Semiconductors |
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4 / 31 page ![]() 4 603 Hardware Specifications • Integrated power management — Low-power 3.3 volt design — Internal processor/bus clock multiplier that provides 1/1, 2/1, 3/1 and 4/1 ratios — Three power saving modes—doze, nap, and sleep — Automatic dynamic power reduction when internal functional units are idle • In-system testability and debugging features through JTAG boundary-scan capability 1.3 General Parameters The following list provides a summary of the general parameters of the 603. Technology 0.5 µ CMOS (four-layer metal) Die size 11.5 mm x 7.4 mm (85 mm2) Transistor count 1.6 million Logic design Fully-static Package Surface mount, 240-pin CQFP Power supply 3.3 ± 5% V dc 1.4 Electrical and Thermal Characteristics This section provides the AC and DC electrical specifications and thermal characteristics for the 603. 1.4.1 DC Electrical Characteristics The tables in this section describe the 603 DC electrical characteristics. Table 1 provides the absolute maximum ratings. Table 1. Absolute Maximum Ratings Characteristic Symbol Value Unit Core supply voltage Vdd –0.3 to 4.0 V PLL supply voltage AVdd –0.3 to 4.0 V Input voltage Vin –0.3 to 5.5 V Storage temperature range Tstg –55 to 150 °C Notes: 1. Functional and tested operating conditions are given in Table 2. Absolute maximum ratings are stress ratings only, and functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability or cause permanent damage to the device. 2. Caution: Vin must not exceed Vdd by more than 2.5 V at anytime including during power-on reset. AR CH IVE D B Y F RE ES CA LE SE MI CO ND UC TO R, INC . |
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