LT8650SPJVPBF datasheet(26/34 Pages) AD

26 / 34 page

LT8650SP

Rev. B

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to 8A per channel rated current. Without the heat sink the

maximum output current will be 4A per channel.

Care should be taken in the layout of the PCB to ensure

good heat sinking of the LT8650SP. The exposed pad on

the bottom of the package must be soldered to a ground

plane. This ground should be tied to large copper layers

below with 24 thermal vias; these layers will spread heat

dissipated by the LT8650SP. Placing additional vias can

reduce thermal resistance further. The maximum load

current should be derated as the ambient temperature

approaches the maximum junction rating. Power dissipa-

tion within the LT8650SP can be estimated by calculating

the total power loss from an efficiency measurement and

subtracting the inductor loss. The die temperature is cal-

culated by multiplying the LT8650SP power dissipation

by the thermal resistance from junction to ambient.

The internal thermal shutdown protection of LT8650SP

will stop switching and indicate a fault condition if junc-

tion temperature exceeds 165°C. The fault condition will

clear and switching resume when the temperature drops

back below 160°C.

TemperatureriseoftheLT8650SPisworstwhenoperating

at high load, high VIN, and high switching frequency. If the

case temperature is too high for a given application, then

either VIN, switching frequency, or load current can be

decreasedtoreducethetemperaturetoanacceptablelevel.

The LT8650SP’s internal power switches are capable

of safely delivering up to 8A of peak output current per

channel. However, due to thermal limits, the package can

only handle 4A loads per channel with heat sinking only

from the bottom of the package into the PCB. Figure 10

and Figure 11 show temperature rise at 400kHz and 2MHz

switching frequencies with different combinations of heat

sinking and airflow. The LT8650SP is capable of about

twice the current when a heat sink is added to the top

of the package and airflow are used versus no heat sink

and no airflow. Figure 12 and Figure 13 show the demo

board configurations with and without a heat sink; these

configurations were used to gather the data in Figure 10

and Figure 11. This data provides a reference of the

LT8650SP current capability; results will vary with heat

sink, chassis, and thermal interface materials of different

size, shape, and type.

APPLICATIONS INFORMATION

PCB Layout

ForproperoperationandminimumEMI,caremustbetaken

during printed circuit board layout. Figure 9 shows the

recommended component placement with trace, ground

plane and via locations. Note that large, switched currents

flow in the LT8650SP’s VIN pins, GND pins, and the input

capacitors. The loop formed by the input capacitor should

be as small as possible by placing the capacitor adjacent

to the VIN and GND pins. When using a physically large

input capacitor the resulting loop may become too large

in which case using a small case/value capacitor placed

close to the VIN and GND pins plus a larger capacitor

further away is preferred. These components, along with

the inductor and output capacitor, should be placed on

the same side of the circuit board, and their connections

should be made on that layer. Place a local, unbroken

ground plane under the application circuit on the layer

closest to the surface layer. The SW and BOOST nodes

should be as small as possible. Finally, keep the FB and

RT nodes small so that the ground traces will shield them

from the SW and BOOST nodes. The exposed pad acts

as a heat sink and is connected electrically to ground. To

keep thermal resistance low, extend the ground plane as

much as possible, and add thermal vias under and near the

LT8650SP to additional ground planes within the circuit

board and on the bottom side. See Figure 9 for example

PCB layout.

High Temperature Considerations

The LT8650SP architecture offers exposed die back on the

package top for heat sink mount. An appropriately sized

and mounted heat sink is required to achieve the full 6A

Figure 8. Reverse VIN Protection for Two Independent Input Voltages

8650sp F08

LT8650SP

GND

EN/UV2

VIN2

EN/UV1

VIN1

VIN2

LT8650SPJVPBF Datasheet(PDF) 26 Page - Analog Devices

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