BQ2022ALPR datasheet(2/20 Pages) TI

2 / 20 page

www.ti.com

ABSOLUTE MAXIMUM RATINGS

DC ELECTRICAL CHARACTERISTICS

AC SWITCHING CHARACTERISTCS

bq2022A

SLUS724 – SEPTEMBER 2006

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

over operating free-air temperature range unless otherwise noted(1)

UNIT

VPU

DC voltage applied to data

–0.3 V to 7 V

IOL

Low-level output current

40 mA

ESD IEC 61000-4-2 Air discharge

Data to VSS, VSS to data

15 kV

Operating free-air temperature range

–20

°C to 70°C

TA(Comm)

Communication free-air temperature range

Communication is specified by design

–40

°C to 85°C

Tstg

Storage temperature range

–55

°C to 125°C

Lead temperature (soldering, 10 s)

260

°C

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

A = –20°C to 70°C; VPU(min) = 2.65 VDC to 5.5 VDC, all voltages relative to VSS

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

IDATA

Supply current

VPU = 5.5 V

µA

Logic 0, VPU = 5.5 V, IOL = 4 mA, SDQ pin

0.4

VOL

Low-level output voltage

Logic 0, VPU = 2.65 V, IOL = 2 mA

0.4

VOH

High-level output voltage

Logic 1

VPU

5.5

IOL

Low-level output current (sink)

VOL = 0.4 V, SDQ pin

VIL

Low-level input voltage

Logic 0

0.8

VIH

High-level input voltage

Logic 1

2.2

VPP

Programming voltage

11.5

A = –20°C to 70°C; VPU(min) = 2.65 VDC to 5.5 VDC, all voltages relative to VSS

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

Bit cycle time(1)

120

µs

tWSTRB

Write start cycle(1)

µs

tWDSU

Write data setup(1)

tWSTRB

µs

tWDH

Write data hold(1)(2)

µs

trec

Recovery time(1)

µs

For memory command only

tRSTRB

Read start cycle(1)

µs

tODD

Output data delay(1)

tRSTRB

µs

tODHO

Output data hold(1)

µs

tRST

Reset time(1)

480

µs

tPPD

Presence pulse delay(1)

µs

tPP

Presence pulse(1)

240

µs

tEPROG

EPROM programming time

2500

µs

tPSU

Program setup time

µs

tPREC

Program recovery time

µs

(1)

5-k

Ω series resistor between SDQ pin and V

PU. (See Figure 1)

(2)

tWDH must be less than tc to account for recovery.

Submit Documentation Feedback

BQ2022ALPR Datasheet(PDF) 2 Page - Texas Instruments

BQ2022ALPR Datasheet(HTML) 2 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Datasheet Download

Link URL