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AT49BV/LV160(T)/161(T)

1427L–FLASH–02/03

The device powers on in the read mode. Command sequences are used to place the device in

other operation modes such as program and erase. The device has the capability to protect

the data in any sector. (See “Sector Lockdown” section.)

To increase the flexibility of the device, it contains an Erase Suspend and Program Suspend

feature. This feature will put the Erase or Program on hold for any amount of time and let the

user read data from or program data to any of the remaining sectors within the memory. The

end of a program or an erase cycle is detected by the Ready/Busy pin, Data Polling or by the

toggle bit.

The VPP pin provides data protection and faster programming. When the V

0.8V, the program and erase functions are inhibited. When V

program and erase operations can be performed. With V

erase operations are accelerated.

A six-byte command (Enter Single Pulse Program Mode) sequence to remove the requirement

of entering the three-byte program sequence is offered to further improve programming time.

After entering the six-byte code, only single pulses on the write control lines are required for

writing into the device. This mode (Single Pulse Byte/Word Program) is exited by powering

down the device, or by pulsing the RESET pin low for a minimum of 500 ns and then bringing

will not work while in this mode; if entered they will result in data being programmed into the

device. It is not recommended that the six-byte code reside in the software of the final product

but only exist in external programming code.

When using the AT49BV/LV160(T) pinout configuration, the device always operates in the

word mode. In the AT49BV/LV161(T) configuration, the BYTE pin controls whether the device

data I/O pins operate in the byte or word configuration. If the BYTE pin is set at logic “1”, the

device is in word configuration, I/O0 - I/O15 are active and controlled by CE and OE.

If the BYTE pin is set at logic “0”, the device is in byte configuration, and only data I/O pins

I/O0 - I/O7 are active and controlled by CE and OE. The data I/O pins I/O8 - I/O14 are tri-

stated, and the I/O15 pin is used as an input for the LSB (A-1) address function.