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IDT7035S/L Datasheet(PDF) 13 Page - Integrated Device Technology |
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IDT7035S/L Datasheet(HTML) 13 Page - Integrated Device Technology |
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13 / 19 page ![]() 6.42 IDT7035S/L High-Speed 8K x 18 Dual-Port Static RAM Industrial and Commercial Temperature Ranges 13 AC Electrical Characteristics Over the Operating Temperature and Supply VoltageRange(1,2) Waveform of BUSY Arbitration Controlled by CE Timing(1) (M/S = VIH) NOTES: 1. 'X' in part numbers indicates power rating (S or L). 2. Industrial temperature: for specific speeds, packages and powers contact your sales office. Waveform of BUSY Arbitration Cycle Controlled by Address Match Timing(1) (M/S = VIH) NOTES: 1. All timing is the same for left and right ports. Port A may be either the left or right port. Port B is the port opposite from A. 2. If tAPS is not satisfied, the BUSY signal will be asserted on one side or another but there is no guarantee on which side BUSY will be asserted. 4088 drw 13 ADDR"A" and "B" ADDRESSES MATCH CE"A" CE"B" BUSY"B" tAPS tBAC tBDC (2) 4088 drw 14 ADDR"A" ADDRESS "N" ADDR"B" BUSY"B" tAPS tBAA tBDA (2) MATCHING ADDRESS "N" Symbol Parameter 7035X15 Com'l Only 7035X20 Com'l Only Unit Min. Max. Min. Max. INTERRUPT TIMING tAS Address Set-up Time 0 ____ 0 ____ ns tWR Write Recovery Time 0 ____ 0 ____ ns tINS Interrupt Set Time ____ 15 ____ 20 ns tINR Interrupt Reset Time ____ 15 ____ 20 ns 4088 tbl 15 |
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