LP62S1024B-I Series

(August, 2004, Version 1.2)

8

AMIC Technology, Corp.

Timing Waveforms (continued)

Read Cycle 4

(1)

Address

CE2

5

OE

CE1

Notes: 1. WE is high for Read Cycle.

3. Address valid prior to or coincident with CE1 transition low.

5. Transition is measured

±500mV from steady state. This parameter is sampled and not 100% tested.

6. CE2 is high.

7. CE1 is low.

8. Address valid prior to or coincident with CE2 transition high.

Write Cycle 1

(6)

(Write Enable Controlled)

Address

CE1

CE2

(4)

WE

(4)