AD7762 datasheet(16/28 Pages) AD

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AD7762

Rev. 0 | Page 16 of 28

DRIVING THE AD7762

+2.5V

–2.5V

+2.5V

–2.5V

+3.685V

+2.048V

+0.410V

+3.685V

+2.048V

+0.410V

VIN+

VIN–

The AD7762 has an on-chip differential amplifier that operates

with a supply voltage (AVDD3) from 3.15 V to 5.25 V. For a 4.096

V reference, the supply voltage must be 5 V.

To achieve the specified performance in normal mode, the

differential amplifier should be configured as a first-order

antialias filter, as shown in Figure 25. Any additional filtering

should be carried out in previous stages using low noise, high

performance op amps, such as the AD8021.

Suitable component values for the first-order filter are listed in

Table 8. The values in Table 8 yield a 10 dB attenuation at the

first alias point of 19 MHz.

Figure 26. Differential Amplifier Signal Conditioning

RIN

RFB

CFB

RIN

RFB

CFB

VIN–

VIN+

RIN

RFB

CFB

RIN

RFB

CFB

VIN–

VIN

VIN+

AD8021

Figure 25. Differential Amplifier Configuration

Table 8. Normal Mode Component Values

Figure 27. Single-Ended-to-Differential Conversion

VREF

RIN

RFB

CFB

4.096 V

1 kΩ

655 Ω

18 Ω

5.6 pF

33 pF

CS2

CPB2

SS4

SH4

CPA

SS2

SH2

CS1

CPB1

SS3

SH3

SS1

SH1

ANALOG

MODULATOR

VIN+

Figure 26 shows the signal conditioning that occurs using the

circuit in Figure 25 with a ±2.5 V input signal biased around

ground and having the component values and conditions in

Table 8. The differential amplifier always biases the output

signal to sit on the optimum common mode of VREF/2, in this

case 2.048 V. The signal is also scaled to give the maximum

allowable voltage swing with this reference value. This is

calculated as 80% of VREF, that is, 0.8 × 4.096 V ≈ 3.275 V p-p

on each input.

To obtain maximum performance from the AD7762, it is

advisable to drive the ADC with differential signals.

Figure 28. Equivalent Input Circuit

Figure 27

shows how a bipolar, single-ended signal biased around ground

can drive the AD7762 with the use of an external op amp, such

as the AD8021.

The AD7762 employs a double sampling front end, as shown in

Figure 28. For simplicity, only the equivalent input circuit for VIN+

is shown. The equivalent input circuitry for VIN− is the same.

With a 4.096 V reference, a 5 V supply must be provided to the

reference buffer (AVDD4). With a 2.5 V reference, a 3.3 V supply

must be provided to AVDD4.

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