TPS40140RHHT datasheet(21/65 Pages) TI

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Phase Switching Frequency − kHz

PHASE FREQUENCY

TIMING RESISTOR

5.21 SYNCHRONIZING A SINGLE CONTROLLER TO AN EXTERNAL CLOCK

TPS40140

DUAL OR 2-PHASE, STACKABLE CONTROLLER

SLUS660A – SEPTEMBER 2005 – REVISED JULY 2006

Figure 5-6. Phase Switching Frequency vs RT

The TPS40140 has the ability to synchronize a single controller to an external clock. The clock must be a

pulse stream at 6 or 8 times the Master PWM frequency. See Figure 5-7.

Synchronizing the single controller to an external clock is similar to synchronizing a clock slave to a clock

master. The single controller is put in clock slave mode by connecting the RT pin to BP5, disabling the

internal clock generator. If the external CLKIO signal is a clock stream without any missing pulses, the

master synchromizes to an arbitrary pulse so there is no determinant phase synchronization. Without a

missing pulse, the PWM frequency will be 1/8 of the external clock. If the external CLKIO signal has a

missing pulse every 6 cycles or 8 cycles, the controller synchronizes based on the missing pulse which

would be in the 6th or 8th position. With the missing pulse, the phase synchronization of the master, to the

missing pulse, can be controlled by the voltage on the PHSEL pin. See the section on DIGITAL CLOCK

SYNCHRONIZATION. Phase shifting would also be desirable if more than one controller were to be

synchronized to the same external clock.

Figure 5-7 shows a time slice of the two external clock possibilities and the resulting PWM signal. EXT

CLK-A is the continuous clock with no missing pulse and the PWM-A signal could be frequency

synchronized anywhere in the clock stream. The PWM signal is at 1/8 of the EXT CLK-A frequency. EXT

CLK-S is the external clock stream with a missing pulse every 8 cycles. The phasing of the PWM-S is

based on the voltage on the PHSEL pin. For PHSEL grounded, the PWM-S signal is shifted 90 degrees

from what would be the falling edge of the missing pulse as shown.

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