CS5165A datasheet(16/18 Pages) ONSEMI

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CS5165A

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This applies for current spikes that are faster than

regulator response time. Printed Circuit Board resistance

will add to the ESR of the output capacitors.

In order to limit spikes to 100 mV for a 14.2 A Load Step,

ESR = 0.1/14.2 = 0.007

Inductor Peak Current

Peak Current

+ Maximum Load Current )

Ripple Current

Example: VIN = +5.0 V, VOUT = +2.8 V, ILOAD = 14.2 A,

L = 1.2

mH, Freq = 200 kHz

Peak Current

+ 14.2 A ) (5.1 2) + 16.75 A

A key consideration is that the inductor must be able to

deliver the Peak Current at the switching frequency without

saturating.

Response Time to Load Increase

(limited by Inductor value unless Maximum On−Time is

exceeded)

Response Time

DIOUT

(VIN * VOUT)

Example: VIN = +5.0 V, VOUT = +2.8 V, L = 1.2 mH, 14.2 A

change in Load Current

Response Time

1.2

14.2 A

(5.0 V

* 2.8 V) +

7.7

Response Time to Load Decrease

(limited by Inductor value)

Response Time

Change in IOUT

VOUT

Example: VOUT = +2.8 V, 14.2 A change in Load Current,

L = 1.2

Response Time

1.2

14.2 A

2.8 V

+ 6.1 ms

Input and Output Capacitors

These components must be selected and placed carefully to

yield optimal results. Capacitors should be chosen to provide

acceptable ripple on the input supply lines and regulator

output voltage. Key specifications for input capacitors are

their ripple rating, while ESR is important for output

capacitors. For best transient response, a combination of low

value/high frequency and bulk capacitors placed close to the

load will be required.

THERMAL MANAGEMENT

Thermal Considerations for Power

MOSFETs and Diodes

In order to maintain good reliability, the junction

temperature of the semiconductor components should be

kept to a maximum of 150

°C or lower. The thermal

impedance (junction to ambient) required to meet this

requirement can be calculated as follows:

Thermal Impedance

TJUNCTION(MAX) * TAMBIENT

Power

A heatsink may be added to TO−220 components to reduce

their thermal impedance. A number of PC board layout

techniques such as thermal vias and additional copper foil

area can be used to improve the power handling capability of

surface mount components.

EMI Management

As a consequence of large currents being turned on and off

at high frequency, switching regulators generate noise as a

consequence of their normal operation. When designing for

compliance

with

EMI/EMC

regulations,

additional

components may be added to reduce noise emissions. These

components are not required for regulator operation and

experimental results may allow them to be eliminated. The

input filter inductor may not be required because bulk filter and

bypass capacitors, as well as other loads located on the board

will tend to reduce regulator di/dt effects on the circuit board

and input power supply. Placement of the power component to

minimize routing distance will also help to reduce emissions.

Layout Guidelines

When laying out the CPU buck regulator on a printed

circuit board, the following checklist should be used to ensure

proper operation of the CS5165A.

CS5165A Datasheet(PDF) 16 Page - ON Semiconductor

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