LMH6321 datasheet(18/21 Pages) NSC

18 / 21 page

Application Hints (Continued)

TABLE 1.

JA vs. Copper Area and PD for TO-263. 1.0

oz cu Board. No Air Flow. Ambient Temperature = 24˚C

Copper Area

θJA @ 1.0W

(˚C/W)

θJA @ 2.0W

(˚C/W)

1 Layer = 1”x2” cu

Bottom

62.4

54.7

2 Layer = 1”x2” cu

Top & Bottom

36.4

32.1

2 Layer = 2”x2” cu

Top & Bottom

23.5

22.0

2 Layer = 2”x4” cu

Top & Bottom

19.8

17.2

As seen in the previous example, buffer dissipation in DC

circuit applications is easily computed. However, in AC cir-

cuits, signal wave shapes and the nature of the load (reac-

tive, non-reactive) determine dissipation. Peak dissipation

can be several times the average with reactive loads. It is

particularly important to determine dissipation when driving

large load capacitance.

A selection of thermal data for the PSOP package is shown

in Table 2. The table summarized

JA for both 0.5 watts and

0.75 watts. Note that the thermal resistance, for both the

TO-263 and the PSOP package is lower for the higher power

dissipation levels. This phenomenon is a result of the prin-

ciple of Newtons Law of Cooling. Restated in term of heat-

sink cooling, this principle says that the rate of cooling and

hence the thermal conduction, is proportional to the tem-

perature difference between the junction and the outside

environment (ambient). This difference increases with in-

creasing power levels, thereby producing higher die tem-

peratures with more rapid cooling.

TABLE 2.

JA vs. Copper Area and PD for PSOP. 1.0 oz

cu Board. No Airflow. Ambient Temperature = 22˚C

Copper Area/Vias

θJA @ 0.5W

(˚C/W)

θJA @ 0.75W

(˚C/W)

1 Layer = 0.05 sq. in.

(Bottom)+3Via

Pads

141.4

138.2

1 Layer = 0.1 sq. in.

(Bottom)+3Via

Pads

134.4

131.2

1 Layer = 0.25 sq. in.

(Bottom)+3Via

Pads

115.4

113.9

1 Layer = 0.5 sq. in.

(Bottom)+3Via

Pads

105.4

104.7

1 Layer = 1.0 sq. in.

(Bottom)+3Via

Pads

100.5

100.2

2 Layer = 0.5 sq. in.

(Top)/ 0.5 sq. in.

(Bottom) + 33 Via

Pads

93.7

92.5

2 Layer = 1.0 sq. in.

(Top)/ 1.0 sq. in.

(Bottom) + 53 Via

Pads

82.7

82.2

ERROR FLAG OPERATION

The LMH6321 provides an open collector output at the EF

pin that produces a low voltage when the Thermal Shutdown

Protection is engaged, due to a fault condition. Under normal

operation, the Error Flag pin is pulled up to V

+ by an external

resistor. When a fault occurs, the EF pin drops to a low

voltage and then returns to V

+ when the fault disappears.

This voltage change can be used as a diagnostic signal to

alert a microprocessor of a system fault condition. If the

function is not used, the EF pin can be either tied to ground

or left open. If this function is used, a 10 k

Ω, or larger, pull-up

resistor (R

2 in Figure 2) is recommended. The larger the

20138630

FIGURE 4. Thermal Resistance (typ) for 7-L TO-263

Package Mounted on 1 oz. (0.036 mm) PC Board Foil

20138631

FIGURE 5. Derating Curve for TO-263 package.

No Air Flow

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