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AD8385ASVZ Datasheet(PDF) 21 Page - Analog Devices

Part # AD8385ASVZ
Description  10-Bit, 12-Channel Decimating LCD DECDRIVER with Level Shifters
PDF  24 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD8385ASVZ Datasheet(HTML) 21 Page - Analog Devices

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AD8385
Rev. 0 | Page 21 of 24
APPLICATIONS CIRCUIT
The following circuit ensures VBIAS symmetry to within 1 mV
with a minimum component count. Bypass capacitors are not
shown for clarity.
AVCC = 15.5V
VZ = 5.1V
DVCC = 3.3V
VCOM = 7V
R1 = 6k
R2 = 1k
V2 = 8V
V1 = 6V
V2
V1
AD8385
AD8132
6
3
2
1
8
V–
V+
VOCM
–IN
+IN
5
4
Figure 19. External VBIAS Generator with the AD8132
VBIAS = 1V
VCOM
V2
V1
VFS = 4V
VFS = 4V
VBIAS = 1V
1023
Figure 20. AD8385 Transfer Function in a Typical High Accuracy System
5.7
6.2
6.7
7.2
7.7
8.2
8.7
9.2
9.7
10.2
10.7
–8.75
–6.25
–3.75
1.25
3.75
6.25
7.50
8.75
–1.25
–7.50
–5.00
0.00
2.50
5.00
–2.50
(V+) – (V–) (V)
TA = 85°C
TA = 25°C
Figure 21. Typical Asymmetry at the Outputs of the AD8132 vs. Its Power
Supply for the Application Circuit
Figure 21 shows that the AD8132 (Figure 19) typically produces
a symmetrical output at 85°C when its supply, (V+) – (V–), is
at 7.2 V.
PCB DESIGN FOR OPTIMIZED THERMAL
PERFORMANCE
The total maximum power dissipation of the AD8385 is partly
load-dependent. In a 12-channel 60 Hz XGA system running at
a 65 MHz pixel rate, the total maximum power dissipation is
2.3 W at an LCD channel input capacitance of 150 pF. At a
100 MHz pixel rate, the total maximum power dissipation can
exceed 3 W.
To limit the operating junction temperature at or below the
guaranteed maximum, the package, in conjunction with the
PCB, must effectively conduct heat away from the junction.
The AD8385 package is designed to provide enhanced thermal
characteristics through the exposed die paddle on the bottom
surface of the package. To take full advantage of this feature, the
exposed paddle must be in direct thermal contact with the PCB,
which then serves as a heat sink.
A thermally effective PCB must incorporate two thermal pads
and a thermal via structure. The thermal pad on the top PCB
layer provides a solderable contact surface on the top surface of
the PCB. The thermal pad on the bottom PCB layer provides a
surface in direct contact with the ambient. The thermal via
structure provides a thermal path to the inner and bottom
layers of the PCB to remove heat.
THERMAL PAD DESIGN
To minimize thermal performance degradation of production
PCBs, the contact area between the thermal pad and the PCB
should be maximized. Therefore, the size of the thermal pad on
the top PCB layer should match the exposed paddle size. The
second thermal pad of at least the same size should be placed on
the bottom side of the PCB. At least one thermal pad should be
in direct thermal contact with a plane such as AVCC or GND.
THERMAL VIA STRUCTURE DESIGN
Effective heat transfer from the top to the inner and bottom
layers of the PCB requires thermal vias incorporated into the
thermal pad design. Thermal performance increases logarith-
mically with the number of vias.
Near optimal thermal performance of production PCBs is
attained only when tightly spaced thermal vias are placed on
the full extent of the thermal pad.



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