Nexperia

74HC273; 74HCT273

Octal D-type flip-flop with reset; positive-edge trigger

25 °C

-40 °C to +85 °C -40 °C to +125 °C

Symbol Parameter

Conditions

Min Typ Max

Min

Max

Min

Max

Unit

74HCT273

CP to Qn; see Fig. 7

[1]

VCC = 4.5 V

-

16

30

-

38

-

45

ns

tpd

propagation

delay

VCC = 5.0 V; CL = 15 pF

-

15

-

-

-

-

-

ns

MR to Qn; see Fig. 8

VCC = 4.5 V

-

23

34

-

43

-

51

ns

tPHL

HIGH to LOW

propagation

delay

VCC = 5.0 V; CL = 15 pF

-

20

-

-

-

-

-

ns

Qn output; see Fig. 7

[2]

tt

transition time

VCC = 4.5 V

-

7

15

-

19

-

22

ns

CP input; see Fig. 7

VCC = 4.5 V

16

9

-

20

-

24

-

ns

MR input LOW; see Fig. 8

tW

pulse width

VCC = 4.5 V

16

8

-

20

-

24

-

ns

MR to CP; see Fig. 8

trec

recovery time

VCC = 4.5 V

10

-2

-

13

-

15

-

ns

Dn to CP; see Fig. 9

tsu

set-up time

VCC = 4.5 V

12

5

-

15

-

18

-

ns

Dn to CP; see Fig. 9

th

hold time

VCC = 4.5 V

3

-4

-

3

-

3

-

ns

CP input; see Fig. 7

VCC = 4.5 V

30

56

-

24

-

20

-

MHz

fmax

maximum

frequency

VCC = 5.0 V; CL = 15 pF

-

36

-

-

-

-

-

MHz

CPD

power

dissipation

capacitance

per package;

VI = GND to VCC - 1.5 V

[3] -

23

-

-

-

-

-

pF

[1] tpd is the same as tPHL and tPLH.

[2] tt is the same as tTHL and tTLH.

[3] CPD is used to determine the dynamic power dissipation (PD in μW).

PD = CPD x VCC 2 x fi + Σ (CL x VCC 2 x fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

Σ (CL x VCC 2 x fo) = sum of outputs;

CL = output load capacitance in pF;

VCC = supply voltage in V.

74HC_HCT273

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 7 — 6 September 2021

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