IR3084 datasheet(34/45 Pages) IRF

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IR3084

Page 34 of 45

07/20/2005

DESIGN EXAMPLE: VRM 11 7−PHASE CONVERTER

SPECIFICATIONS

Input Voltage: VI = 12V

DAC Voltage: VDAC = 1.3V

No Load Output Voltage Offset: VO_NLOFST = 15mV

Output Current: IO = 130 ADC

Maximum Output Current: IOMAX = 150 ADC

Load Line Slope: RO = 1.20 m

VRM11 Startup Boot Voltage = 1.100V

Soft Start Time: TD2 = 1.1ms

VCC Ready to VCC Power Good Delay: TD5 = 1.0ms

Over Current Delay: TOCDEL = 250µs

Dynamic VID Negative Slew Rate: SRDOWN = 2.5mV/us

Over Temperature Threshold: TPCB = 115 ºC

POWER STAGE

Phase Number: n = 7

Switching Frequency: fSW=400 kHz

Output Inductors: L = 220 nH, RL = 0.60 m

Output Capacitors: C = 560uF, RC = 7m , Number Cn = 10

IR3084 EXTERNAL COMPONENTS

Oscillator Resistor Rosc

The switching frequency sets the value of ROSC as shown by the curve in Figure 13 on page 6. In this design,

the switching frequency of 400kHz per phase requires ROSC to be 30.1k .

VDAC Slew Rate Programming Capacitor CVDAC and Resistor RVDAC

From Figure 17 on page 6, the sink current of the VDAC pin at 400kHz (ROSC=30.1k ) is 80uA. Calculate the

VDAC slew-rate programming capacitor from the specified negative slew rate using Equation (1).

DOWN

SINK

VDAC

−

Choose CVDAC = 33nF

Calculate the VDAC compensation resistor from Equation (2);

3.5

)

(33*10

3.2*10

0.5

3.2*10

0.5

VDAC

−

From Figure 17 on page 6, the source current of the VDAC pin is 90uA at ROSC = 30.1K . The VDAC positive

slew rate is can be calculated using Equation (3);

2.7mV/uS

33*10

90*10

VDAC

SOURCE

−

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