Nexperia

74HC3G07; 74HCT3G07

Triple buffer with open-drain outputs

5. Functional diagram

001aah762

3A

3Y

2A

2Y

1A

1Y

Fig. 1. Logic symbol

001aah763

3Y

3A

2Y

2A

1Y

1A

1

1

1

Fig. 2. IEC logic symbol

mna591

Y

A

GND

Fig. 3. Logic diagram (one buffer)

6. Pinning information

6.1. Pinning

74HC3G07

74HCT3G07

1A

VCC

3Y

1Y

2A

3A

GND

2Y

001aak032

1

2

3

4

6

5

8

7

Fig. 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)

6.2. Pin description

Table 3. Pin description

Symbol

Pin

Description

1A, 2A, 3A

1, 3, 6

data input

GND

4

ground (0 V)

1Y, 2Y, 3Y

7, 5, 2

data output

VCC

8

supply voltage

7. Functional description

Table 4. Function table

H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.

Input nA

Output nY

L

L

H

Z

74HC_HCT3G07

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© Nexperia B.V. 2019. All rights reserved

Product data sheet

Rev. 5 — 24 January 2019

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