CS5535 datasheet(429/555 Pages) NSC

429 / 555 page

Revision 0.8

429

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RTC Register Descriptions (Continued)

5.15.2.13 RTC Control Register C (RTC_CRC)

5.15.2.14 RTC Control Register D (RTC_CRD)

I/O Address

0Ch

Type

Reset Value

00h

RTC_CRC Register Map

76543

210

IRQF

RSVD

RTC_CRC Bit Descriptions

Bit

Name

Description

7IRQF (RO)

IRQ Flag (Read Only). This RO bit mirrors the value on the interrupt output signal.

When interrupt is active, IRQF is 1. Reading this register clears this bit (and deactivates

the interrupt pin) and clears the flag bits UF, AF, and PF.

0: IRQ inactive.

1: Logic equation is true: ((UIE and UF) or (AIE and AF) or (PIE and PF)).

6PF (RO)

Periodic Interrupts Flag (Read Only). This RO bit is cleared to 0 on an RTC reset

(i.e., hardware reset) or when the RTC is disabled. In addition, this bit is cleared to 0

when this register is read.

0: No transition occurred on the selected tap since the last read.

1: Transition occurred on the selected tap of the divider chain.

5AF (RO)

Alarm Interrupt Flag (Read Only). This RO bit is cleared to 0 as long as bit 7 of

RTC_CRD (VRT bit) is 0. In addition, this bit is cleared to 0 when this register is read.

0: No alarm detected since the last read.

1: Alarm condition detected.

4UF (RO)

Update Ended Interrupts Flag (Read Only). This RO bit is cleared to 0 on an RTC

reset (i.e., hardware reset) or when the RTC is disabled. In addition, this bit is cleared

to 0 when this register is read.

0: No update occurred since the last read.

1: Time registers updated.

RSVD (RO)

Reserved (Read Only). Reads as 0.

I/O Address

0Dh

Type

Reset Value

00h

RTC_CRD Register Map

76543

210

VRT

RSVD

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