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CS5535 Datasheet(PDF) 433 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # CS5535
Description  Geode??CS5535 I/O Companion Multi-Function South Bridge
PDF  555 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CS5535 Datasheet(HTML) 433 Page - National Semiconductor (TI)

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Revision 0.8
433
www.national.com
GPIO Subsystem Register Descriptions (Continued)
3Ch
(Note 1)
R/W
32
GPIO Low Bank Lock Enable (GPIOL_LOCK_EN)
00000000h
Page 452
40h
R/W
32
GPIO Low Bank Input Positive Edge Enable
(GPIOL_IN_POSEDGE_EN)
FFFF0000h
Page 447
44h
R/W
32
GPIO Low Bank Input Negative Edge Enable
(GPIOL_IN_NEGEDGE_EN)
FFFF0000h
Page 447
48h
R/W
32
GPIO Low Bank Input Positive Edge Status
(GPIOL_IN_POSEDGE_STS)
FFFF0000h
Page 448
4Ch
R/W
32
GPIO Low Bank Input Negative Edge Status
(GPIOL_IN_NEGEDGE_STS)
FFFF0000h
Page 449
GPIO High Bank Feature Bit Registers
80h
R/W
32
GPIO High Bank Output Value (GPIOH_OUT_VAL)
FFFF0000h
Page 438
84h
R/W
32
GPIO High Bank Output Enable (GPIOH_OUT_EN)
FFFF0000h
Page 438
88h
R/W
32
GPIO High Bank Output Open-Drain Enable
(GPIOH_OUT_OD_EN)
FFFF0000h
Page 439
8Ch
R/W
32
GPIO High Bank Output Invert Enable
(GPIOH_OUT_INVRT_EN)
FFFF0000h
Page 439
90h
R/W
32
GPIO High Bank Output Auxiliary 1 Select
(GPIOH_OUT_AUX1_SEL)
FFFF0000h
Page 440
94h
R/W
32
GPIO High Bank Output Auxiliary 2 Select
(GPIOH_OUT_AUX2_SEL)
FFFF0000h
Page 441
98h
R/W
32
GPIO High Bank Pull-Up Enable (GPIOH_PU_EN)
0000FFFFh
Page 442
9Ch
R/W
32
GPIO High Bank Pull-Down Enable
(GPIOH_PD_EN)
FFFF0000h
Page 442
A0h
R/W
32
GPIO High Bank Input Enable (GPIOH_IN_EN)
EFFF1000h
Page 443
A4h
R/W
32
GPIO High Bank Input Invert Enable
(GPIOH_IN_INV_EN)
FFFF0000h
Page 443
A8h
R/W
32
GPIO High Bank Input Filter Enable
(GPIOH_IN_FLTER_EN)
FFFF0000h
Page 444
ACh
R/W
32
GPIO High Bank Input Event Count Enable
(GPIOH_IN_EVNTCNT_EN)
FFFF0000h
Page 445
B0h
(Note 1)
RO
32
GPIO High Bank Read Back (GPIOH_READ_BACK)
00000000h
Page 451
B4h
R/W
32
GPIO High Bank Input Auxiliary 1 Select
(GPIOH_IN_AUX1_SEL)
EFFF1000h
Page 446
B8h
R/W
32
GPIO High Bank Events Enable (GPIOH_EVNT_EN)
FFFF0000h
Page 446
BCh
(Note 1)
R/W
32
GPIO High Bank Lock Enable (GPIOH_LOCK_EN)
00000000h
Page 453
C0h
R/W
32
GPIO High Bank Input Positive Edge Enable
(GPIOH_IN_POSEDGE_EN)
FFFF0000h
Page 447
C4h
R/W
32
GPIO High Bank Input Negative Edge Enable
(GPIOH_IN_NEGEDGE_EN)
FFFF0000h
Page 447
C8h
R/W
32
GPIO High Bank Input Positive Edge Status
(GPIOH_IN_POSEDGE_STS)
FFFF0000h
Page 448
Table 5-57. GPIO Low/High Bank Feature Bit Registers Summary (Continued)
GPIO I/O
Offset
Type
Width
(Bits)
Register Name
Reset
Value
Reference



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