CS5535 datasheet(443/555 Pages) NSC

443 / 555 page

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GPIO Subsystem Register Descriptions (Continued)

5.16.2.9

GPIO Input Enable (GPIO[x]_IN_EN)

These registers control the input enable for the low (GPIO[15:0]) and high (GPIO[31:16]) banks of GPIOs. If the feature bit

is high, the input is enabled. If the feature bit is low, the input is disabled.The reset value forces all the inputs to be disabled.

(These registers use atomic programming, see Section 5.16.1 on page 436 for details.)

GPIO Low Bank Input Enable (GPIOL_IN_EN)

GPIO High Bank Input Enable (GPIOH_IN_EN)

5.16.2.10 GPIO Input Invert Enable (GPIO[x]_IN_INVRT_EN)

These registers control the input invert enable for the low (GPIO[15:0]) and high (GPIO[31:16]) banks of GPIOs. The input

is inverted if the feature bit is high. The input is not inverted if the feature bit is low. (These registers use atomic program-

ming, see Section 5.16.1 on page 436 for details.)

GPIO Low Bank Input Invert Enable

(GPIOL_IN_INVRT_EN)

GPIO High Bank Input Invert Enable

(GPIOH_IN_INV_EN)

GPIO I/O Offset

20h

Type

R/W

Reset Value

FFFF0000h

GPIO I/O Offset

A0h

Type

R/W

Reset Value

EFFF1000h

GPIOL_IN_EN Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

GPIOH_IN_EN Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

GPIO I/O Offset

24h

Type

R/W

Reset Value

FFFF0000h

GPIO I/O Offset

A4h

Type

R/W

Reset Value

FFFF0000h

GPIOL_IN_INVRT_EN Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

GPIOH_IN_INVRT_EN Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

CS5535 Datasheet(PDF) 443 Page - National Semiconductor (TI)

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