CS5535 datasheet(446/555 Pages) NSC

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GPIO Subsystem Register Descriptions (Continued)

5.16.2.13 GPIO Input Auxiliary 1 Select (GPIO[x]_IN_AUX1_SEL)

Each GPIO has a dedicated internal destination for the conditioned input from the component ball; these inputs are acti-

vated when Auxiliary 1 Input is selected. Table 2-8 "GPIO Options" on page 42 shows all the dedicated destinations. These

registers select the Auxiliary 1 Input of the low (GPIO[15:0]) and high (GPIO[31:16]) banks of GPIOs. Auxiliary 1 Input is

selected as the input if the feature bit is high. Auxiliary 1 is not selected as the input if the feature bit is low. (These registers

use atomic programming, see Section 5.16.1 on page 436 for details.)

GPIO Low Bank Input Auxiliary 1 Select

(GPIOL_IN_AUX1_SEL)

GPIO High Bank Input Auxiliary 1 Select

(GPIOH_IN_AUX1_SEL)

5.16.2.14 GPIO Event Enable (GPIO[x]_EVNT_EN)

These registers control the Event Enable for INT (Interrupt) and PME (Power Management Event) mapping of the low

(GPIO[15:0]) and high (GPIO[31:16]) banks of GPIOs. The GPIO is enabled for mapping if the feature bit is high. The GPIO

is disabled from mapping if the feature bit is low. Actual mapping is performed by the GPIO X, Y, Z, and W mapping regis-

ters, detailed on page 465 through page 462; the Event Enable registers simply enable/disable the associated GPIO for

mapping. (These registers use atomic programming, see Section 5.16.1 on page 436 for details.)

GPIO Low Bank Events Enable (GPIOL_EVNT_EN)

GPIO High Bank Events Enable (GPIOH_EVNT_EN)

GPIO I/O Offset

34h

Type

R/W

Reset Value

FFFF0000h

GPIO I/O Offset

B4h

Type

R/W

Reset Value

EFFF1000h

GPIOL_IN_AUX1_SEL Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

GPIOH_IN_AUX1_SEL Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

GPIO I/O Offset

38h

Type

R/W

Reset Value

FFFF0000h

GPIO I/O Offset

B8h

Type

R/W

Reset Value

FFFF0000h

GPIOL_EVNT_EN Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

GPIOH_EVNT_EN Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

CS5535 Datasheet(PDF) 446 Page - National Semiconductor (TI)

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