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CS5535 Datasheet(PDF) 448 Page - National Semiconductor (TI) |
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CS5535 Datasheet(HTML) 448 Page - National Semiconductor (TI) |
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448 / 555 page  www.national.com 448 Revision 0.8 GPIO Subsystem Register Descriptions (Continued) 5.16.2.17 GPIO Input Positive Edge Status (GPIO[x]_IN_POSEDGE_STS) These registers report the status of the positive edge detection function for the low (GPIO[15:0]) and high (GPIO[31:16]) banks of GPIOs. Writing a 1 clears the detected edge and reading returns the current status. (These registers use atomic programming, see Section 5.16.1 on page 436 for details.) GPIO Low Bank Input Positive Edge Status (GPIOL_IN_POSEDGE_STS) GPIO High Bank Input Positive Edge Status (GPIOH_IN_POSEDGE_STS) GPIO I/O Offset 48h Type R/W Reset Value FFFF0000h GPIO I/O Offset C8h Type R/W Reset Value FFFF0000h GPIOL_IN_POSEDGE_STS Register Map 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 98 7654321 0 GPIOH_IN_POSEDGE_STS Register Map 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 98 7654321 0 |
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