CS5535 datasheet(461/555 Pages) NSC

461 / 555 page

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461

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GPIO Subsystem Register Descriptions (Continued)

GPIO High Bank Event Counter Decrement (GPIOL_EVNTCNT_DEC)

GPIO I/O Offset

FCh

Type

R/W

Reset Value

00000000h

GPIOH_EVNTCNT_DEC Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9876543210

RSVD

GPIOH_EVNTCNT_DEC Bit Descriptions

Bit

Name

Description

31:13

RSVD

Reserved. Write/read as 0.

ECD28

GPIO28 Event Counter Decrement. Writing this bit high generates a decrement pulse to

the event counter that has been associated with this GPIO. There is no need to write the bit

low again. This bit will always read as low. Event counters are associated with specific

GPIOs via the GPIO_FE[x]_SEL register set.

ECD27

GPIO27 Event Counter Decrement. Same as EDC28 (bit 12).

ECD26

GPIO26 Event Counter Decrement. Same as EDC28 (bit 12).

ECD25

GPIO25 Event Counter Decrement. Same as EDC28 (bit 12).

ECD24

GPIO24 Event Counter Decrement. Same as EDC28 (bit 12).

RSVD

Reserved. Write/read as 0.

ECD22

GPIO22 Event Counter Decrement. Same as EDC28 (bit 12).

ECD21

GPIO21 Event Counter Decrement. Same as EDC28 (bit 12).

ECD20

GPIO20 Event Counter Decrement. Same as EDC28 (bit 12).

ECD19

GPIO19 Event Counter Decrement. Same as EDC28 (bit 12).

ECD18

GPIO18 Event Counter Decrement. Same as EDC28 (bit 12).

ECD17

GPIO17 Event Counter Decrement. Same as EDC28 (bit 12).

ECD16

GPIO16 Event Counter Decrement. Same as EDC28 (bit 12).

CS5535 Datasheet(PDF) 461 Page - National Semiconductor (TI)

CS5535 Datasheet(HTML) 461 Page - National Semiconductor (TI)

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