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CS5535 Datasheet(PDF) 167 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # CS5535
Description  Geode??CS5535 I/O Companion Multi-Function South Bridge
PDF  555 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CS5535 Datasheet(HTML) 167 Page - National Semiconductor (TI)

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PMC Functional Description (Continued)
GPE[23:0]
(General Purpose
Power Manage-
ment Events in
Working Domain)
Working
If GPE_EN[23:0] are enabled (ACPI I/O Offset 1Ch[23:0] = 1), the corresponding
status bit (GPE_STS[23:0]) in GPE0_STS (ACPI I/O Offset 18h[23:0]) is set and an
SCI is generated.
Sleep
If GPE_EN[23:0] are enabled (ACPI I/O Offset 1Ch[23:0] = 1), SCI generation and
wakeup from the event is enabled (i.e., sets the WAK_STS bit, ACPI I/O Offset
00h[15] = 1).
GPE[31:24]
(General Purpose
Power Manage-
ment Events in
Standby Domain)
Working
If GPE_EN[31:24] are enabled (ACPI I/O Offset 1Ch[31:24] = 1), the corresponding
status bit (GPE_STS[31:24]) in GPE0_STS (ACPI I/O Offset 18h[23:0]) is set and an
SCI is generated.
Sleep
If GPE_EN[31:24] are enabled (ACPI I/O Offset 1Ch[23:0] = 1), SCI generation and
wakeup from the event is enabled (i.e., sets the WAK_STS bit, ACPI I/O Offset
00h[15] = 1).
Standby
If GPE_EN[31:24] are enabled (ACPI I/O Offset 1Ch[31:24] = 1), the corresponding
status bit (GPE_STS[31:24]) in GPE0_STS (ACPI I/O Offset 18h[23:0]) is set, and
SCI generation and wakeup from the event is enabled (i.e., sets the WAK_STS bit,
ACPI I/O Offset 00h[15] = 1).
The following events caused a Standby state entry.
RESET_STAND#
Working
If asserted, the corresponding status bit (OFF_FLAG) in PM_SSC (PMS I/O Offset
54h[0]) is set and causes a Reset Standby state entry. No Working or Standby
power.
Sleep
If asserted, the corresponding status bit (OFF_FLAG) in PM_SSC (PMS I/O Offset
54h[0]) is set and causes a Reset Standby state entry. No Working or Standby
power.
Standby
If asserted in Restart, or Normal or Faulted Standby state, the corresponding status
bit (OFF_FLAG) in PM_SSC (PMS I/O Offset 54h[0]) is set and causes a Reset
Standby state entry.
LVD circuit detects
low voltage on
VCORE
Working
If de-asserted, the status bit (LVD_FLAG) in PM_SSC (PMS I/O Offset 54h[2]) is set
and causes an Faulted Standby state entry. Working power is turned-off.
Sleep
If de-asserted, the status bit (LVD_FLAG) in PM_SSC (PMS I/O Offset 54h[2]) is set
and causes an Faulted Standby state entry. Working power is turned-off.
Standby
If de-asserted in Restart state, the status bit (LVD_FLAG) in PM_SSC (PMS I/O Off-
set 54h[2]) is set and causes an Faulted Standby state entry.
PWR_BTN#
Working
If enabled and asserted for four seconds (fail-safe), the status bit (PWRBUT_FLAG)
in PM_SSC (PMS I/O Offset 54h[3]) is set and causes an Faulted Standby state
entry. Working power is turned-off.
Sleep
If enabled and asserted for four seconds (fail-safe), the status bit (PWRBUT_FLAG)
in PM_SSC (PMS I/O Offset 54h[3]) is set and causes an Faulted Standby state
entry. Working power is turned-off.
Standby
If enabled and asserted for four seconds (fail-safe) while in Normal or Restart state,
the status bit (PWRBUT_FLAG) in PM_SSC (PMS I/O Offset 54h[3]) is set and
causes a Faulted Standby state entry.
THRM_ALRM#
Working
If enabled and asserted for a programmable amount of time, the status bit
(THRM_FLAG) in PM_SSC (PMS I/O Offset 54h[4]) is set and causes an Faulted
Standby state entry. Working power is turned-off.
Sleep
If enabled and asserted for a programmable amount of time, the status bit
(THRM_FLAG) in PM_SSC (PMS I/O Offset 54h[4]) is set and causes an Faulted
Standby state entry. Working power is turned-off.
Standby
If asserted in Normal or Re-start state, the status bit (THRM_FLAG) in PM_SSC
(PMS I/O Offset 54h[4]) is set and causes a Faulted state entry.
Table 4-35. PM Events and Functions (Continued)
Event
Current
State
Function



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