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MP1922 Datasheet(PDF) 12 Page - Monolithic Power Systems |
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MP1922 Datasheet(HTML) 12 Page - Monolithic Power Systems |
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12 / 21 page ![]() MP1922 – 100V, 3A, SINGLE-CHANNEL, HALF-BRIDGE PRE-DRIVER IC MP1922 Rev. 1.0 www.MonolithicPower.com 12 9/10/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. OPERATION The MP1922 is a 100V, single-channel, integrated circuit (IC) half-bridge pre-driver for driving two N-channel power MOSFETs with up to 3A source and 4A sink current capability. The device also supports output supply voltages up to 100V. The MP1922 features low-power sleep mode, which disables the device and draws a very low supply current. It also provides flexible functions such as configurable output slew rate, adjustable dead-time control, and output desaturation detection, which allow the device to be used in many applications. Start-Up Start-up is initiated by the application of voltage to the VG pin. To initiate start-up, the VG voltage (VG), which is the power supply voltage for the MP1922, must exceed the VUVLO threshold (about 3.1V). After VG exceeds this threshold, the MP1922 turns on the internal circuitry, including the high- side gate drive charge pump. If auto-refresh is enabled at start-up and the AR pin is grounded, then the MP1922 initiates a bootstrap (BST) charge cycle by briefly turning off the high-side MOSFET (HS-FET) and turning on the low-side MOSFET (LS-FET) during start-up. If the output is commanded high (INH = H, INL = L) before the BST charge process is complete, then a fault may be triggered due to insufficient gate drive voltage for fully turning on the HS- FET. If auto-refresh is not enabled, then the LS- FET should be turned on for at least a few microseconds to quickly charge the BST capacitor (CBST). Relying on the internal charge pump to initially charge CBST is not recommended due to limited current capability and the time required to provide sufficient charge to the capacitor. The start-up process takes between 1ms and 2ms. Sleep Operation By driving nSLEEP low, the device enters a low-power sleep state, in which all internal circuits are disabled and all inputs are ignored. To wake up from sleep mode, about 1ms must pass for the circuits to initialize and for the gate drive charge pump to start up before the device drives the FETs. Input Logic The INH input pin is used to control the HS-FET gate drive. The INL pin controls the LS-FET gate drive. Positive dead time is enforced by the device. If both INH and INL are driven high, then neither FET is driven (see Table 1). Table 1: Input Logic INL INH OUT H H High impedance H L GND L H VIN L L High impedance The ENBL pin enables the outputs. When ENBL is low, both the high-side (HS) and low- side (LS) gate drive outputs are pulled to ground, disabling both output FETs. The ENBL input can be used for fast protection circuits. nFAULT The nFAULT pin reports to the system when a fault condition, such as output FET desaturation or over-temperature (OT), is detected. nFAULT is an open-drain output, and is pulled low when a fault occurs. If the fault condition is reset by de-asserting ENBL, removing VG, or activating nSLEEP, then the nFAULT pin is pulled high by the external pull-up resistor. The nFAULT pin can be connected to the ENBL input pin and a pull-up resistor to make the MP1922 automatically restart after a fault. When a fault occurs, the nFAULT pin pulls the ENBL pin low, which resets the fault condition. After this reset, the pull-up resistor pulls ENBL high again. Adding a capacitor in parallel with the pull-up resistor introduces a delay in re-enabling the MP1922 and extends the retry cycle. The RC time constant sets the retry delay. |
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