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82545EM Datasheet(PDF) 13 Page - Intel Corporation |
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82545EM Datasheet(HTML) 13 Page - Intel Corporation |
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13 / 28 page ![]() 82545EM GIGABIT ETHERNET CONTROLLER SPECIFICATION UPDATE 3. MDI/MDI-X Crossover Auto-Detection Not Working Problem: The 82545EM controller feature for automatically detecting crossover cables fails to clearly detect the cable type. If a crossover cable is used when it is not required, the controller will not establish link. Implication: Crossover cables to hubs and switches cannot be used unless the transmit/receive pairs are known to be crossed at the link partner. Using MII management registers to manually set the specific MDI or MDI-X configuration corresponding to the cable will allow link to be successfully established. Workaround: Use straight-through cables to hubs and switches, unless the hub or switch port is crossed. Intel’s driver code will disable auto MDI-X detection/correction and configure the 82545EM Controller for fixed MDI behavior. Alternatively, MII Management registers can be used to manually configure a particular forced MDI/MDI-X configuration. To do so, bits 6:5 of MII Register 16 should be set to 00 (for uncrossed MDI) or 01 (for crossed MDI-X). Follow this operation with a write to MII Register 0 with bit 15 set to 1 in order to reset the PHY. For the A0 stepping, Intel provided network drivers with registry-settable or command-line options to specify the correct manual MDI or MDI-X configuration . Status: Intel resolved this erratum in the A1 stepping of the 82545EM Gigabit Ethernet Controller. 4. ASF/Manageability Transmit and Receive Not Functional in D3 State without APM Problem: If the controller is in the Dr, D0u, or D3 power states, manageability functions do not work unless APM is enabled. Without power management wake-up enabled, part of an internal clock tree is becomes disabled. Implication: Power management wake-up must be enabled if low power and pre-boot manageability operation is desired. Workaround: Enable APM in the EEPROM image by setting bit 10 of the Management Control Word (word 24h) to 1. If APM wake-ups from D3 state are not desired, ignore or mask APM_WAKEUP, and disable APM wakeups from being promoted to PME# assertions by programming bit 15 of the EEPROM Initialization Control Word 2 (word 0Fh) to zero. Status: Intel resolved this erratum in the A1 stepping of the 82545EM Gigabit Ethernet Controller. 5. Wake-Up Disable Control for TCO / Manageability Packets Problem: The 82545EM controller A0 stepping did not implement the RMCP and Ignore TCO wake-up disable bits planned for the Wakeup Filter Control Register (WUFC). These bits were intended to provide control over whether specific packet types that are received and detected as TCO/management packets per the Manageability Control Register (MANC) settings can initiate ACPI wakeup events. Implication: If ACPI wakeups that overlap with TCO/Management packets are enabled, the TCO/management packets (directed RMCP and/or ARPs) will cause wakeup events from D3 state, even if these packets are expected to be received and serviced quietly by the TCO controller. It may not be possible to configure ACPI wakeups to occur on a specific desired subset of non-TCO packets. Workaround: If ACPI wakeups due to TCO/management packets are unwanted during D3 state ASF/Manageability operation, disable all relevant bits associated with Individual Address (IA) match conditions (EX, BC, MC) as well as ARP and Directed IP match conditions (ARP, IPV4) in the Wakeup Filter Control Register (WUFC). Status: Intel resolved this erratum in the A1 stepping of the 82545EM Gigabit Ethernet Controller. The Ignore TCO bit is implemented to allow all packets classified as TCO packets to be specifically excluded from wake-up generation. Intel has determined that the RMCP bit is an unnecessary control and did not implement it. 6. ASF State Machines Out of Sync on Power Up Problem: Upon power up, two state machines in the ASF logic may intermittently be out of sync, causing the ASF core to be locked up. The problem is due to an internal signal that does not remain valid long enough to assure sampling. Implication: If the ASF state logic is deadlocked, no ASF/manageability operations can occur. Workaround: Reset the ASF core prior to first use. For OS-present ASF operation, the reset code can be in the ASF driver. For pre-OS ASF operation, the reset code can be placed in the system BIOS. To perform the reset operation, issue an SMBus Byte Write with the following parameters: • SMBus Address = Configured ASF address (typically C8h or 64h) • Command Code = F3h (selects the register) • Data value = 80h (selects the software reset bit) Status: Intel resolved this erratum in the A1 stepping of the 82545EM Gigabit Ethernet Controller. 11 |
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