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UPD17062 Datasheet(PDF) 238 Page - Renesas Technology Corp |
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UPD17062 Datasheet(HTML) 238 Page - Renesas Technology Corp |
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238 / 298 page  236 µPD17062 b3 b2 b1 #0 (MSB) (LSB) (RF : 21H) ADCCMP ADCCH2 ADCCH1 ADCCH0 Selected pin 0 0 0 ADC0 0 0 1 P1C3/ADC1 0 1 0 P0D0/ADC2 0 1 1 P0D1/ADC3 1 0 0 P0D2/ADC4 1 0 1 P0D3/ADC5 11 0 No corresponding pin (do not set) 11 1 19.5 ADC PIN SELECT REGISTER (ADCCHn) The ADCCHn register selects an A/D converter input pin. It is mapped at the upper 3 bits of the register file at address 21H. Table 19-2 lists the relationships between the ADCCHn and the actually selected pins. Table 19-2 ADC Pin Selection When using P1C3/ADC1 as the A/D converter, specify the P1C as an input port. The P0D0/ADC2 to P0D3/ADC5 pins are internally equipped with pull-down resistors, but the pull-down resistors are disconnected when they are selected as the A/D converter. If P1C and P0D pins selected as the A/D converter are accessed as ports, “0” is read out. |
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