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UPD17062 Datasheet(PDF) 239 Page - Renesas Technology Corp |
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UPD17062 Datasheet(HTML) 239 Page - Renesas Technology Corp |
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239 / 298 page  237 µPD17062 19.6 EXAMPLE OF A/D CONVERSION PROGRAM The following example shows an A/D conversion program based on the successive comparison method. The result of conversion is held in the DBF0. Sample program DBF0B3 FLG 0.0FH.3 DBF0B2 FLG 0.0FH.2 DBF0B1 FLG 0.0FH.1 DBF0B0 FLG 0.0FH.0 START: BANK0 INITFLG DBF0B3, NOT DBF0B2, NOT DBF0B1, NOT DBF0B0 ; Sets DBF data. PUT ADCR, DBF ; Sets reference voltage. SKT1 ADCCMP ; Judges comparison result. CLR1 DBF0B3 ; DBF0B3 ← 0 SET1 DBF0B2 ; DBF0B2 ← 1 PUT ADCR, DBF ; Sets reference voltage. SKT1 ADCCMP ; Judges comparison result. CLR1 DBF0B2 ; DBF0B2 ← 0 SET1 DBF0B1 ; DBF0B1 ← 1 PUT ADCR, DBF ; Sets reference voltage. SKT1 ADCCMP ; Judges comparison result. CLR1 DBF0B1 ; DBF0B1 ← 0 SET1 DBF0B0 ; DBF0B0 ← 1 PUT ADCR, DBF ; Sets reference voltage. SKT1 ADCCMP ; Judges comparison result. CLR1 DBF0B0 ; DBF0B0 ← 0 END: Number of steps in the conversion loop : 17 Conversion time : 34 µs (not in DMA mode) Conversion time : 204 µs (in DMA mode) |
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