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RT5758 Datasheet(PDF) 21 Page - Richtek Technology Corporation |
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RT5758 Datasheet(HTML) 21 Page - Richtek Technology Corporation |
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21 / 26 page ![]() RT5758 21 DS5758-00 April 2018 www.richtek.com © Copyright 2018 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Figure 10. PCB Layout Guide (Top Layer) Figure 11. PCB Layout Guide (Bottom Layer) Layout Consideration VIN EN BOOT SW PGND VIN AVCC AGND IC 1 2 3 4 5 6 7 8 9 10 11 12 13 L COUT1 COUT2 COUT3 COUT4 CIN1 CIN2 VOUT CAVCC VAVCC RPGOOD CSS VOUT R1 R2 REN CBOOT Place the feedback components as close to the IC as possible. PGND layout trace should be wider for thermal consideration. SW should be connected to inductor by wide and short trace, and keep sensitive components away from this trace. AVCC capacitor must be placed as close to the IC as possible. Input capacitor must be placed as close to the IC as possible. Add via for thermal consideration. Keep sensitive components away from CBOOT. Power Good Indicator Open-Drain Output. The REN component must be connected. AGND must be connected to clear ground. PGND Add via for thermal consideration. |
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