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VV6501 Datasheet(PDF) 29 Page - STMicroelectronics |
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VV6501 Datasheet(HTML) 29 Page - STMicroelectronics |
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29 / 60 page ![]() 29/60 VV6501 Serial Control Bus The first byte contains the device address byte which includes the data direction read, (r), ~write, (~w), bit. The byte following the address byte contains the address of the first data byte (also referred to as the index). The serial interface can address up to 128 byte registers. If the MSB of the second byte is set, the automatic increment feature of the address index is selected. 4.2.2 Message interpretation All serial interface communications with the sensor must begin with a start condition. If the start condition is followed by a valid address byte then further communications can take place. The sensor will acknowledge the receipt of a valid address by driving the sda wire low. The state of the read/~write bit (LSB of the address byte) is stored and the next byte of data, sampled from sda, can be interpreted. During a write sequence the second byte received is an address index and is used to point to one of the internal registers. The MSB of the following byte is the index auto increment flag. If this flag is set then the serial interface will automatically increment the index address by one location after each slave acknowledge. The master can therefore send data bytes continuously to the slave until the slave fails to provide an acknowledge or the master terminates the write communication with a stop condition or sends a repeated start, (Sr). If the auto increment feature is used the master does not have to send indexes to accompany the data bytes. As data is received by the slave, it is written bit by bit to a serial/parallel register. After each data byte has been received by the slave, an acknowledge is generated, the data is then stored in the internal register addressed by the current index. During a read message, the current index is read out in the byte following the device address byte. The next byte read from the slave device are the contents of the register addressed by the current index. The contents of this register are then parallel loaded into the serial/parallel register and clocked out of the device by scl. At the end of each byte, in both read and write message sequences, an acknowledge is issued by the receiving device. Although VV6501 is always considered to be a slave device, it acts as a transmitter when the bus master requests a read from the sensor. Figure 23: VV6501 Serial interface address Figure 24: Serial interface data format 0 0 1 0 0 0 0 R/W S address[7:1] R/ W bit A DATA[7:0] A Sensor acknowledges valid address Acknowledge from slave INDEX[6:0] INC P A A DATA[7:0] [0] address Auto increment Index bit |
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