SNC21085

1-CH H.Q. Speech Controller

5. FUNCTION DESCRIPTIONS

5.1

Oscillator

System clock define 2 Mhz, the souce provided by internal R-type ring oscillator or

external resistor ring oscillator. This option is controlled by pin, RCSEL.

RCSEL = 1

using the external R 180Kohm

RCSEL = 0

using the internal R

5.2

ROM

SNC21085 contains a substantial maximum 256K words (10-bit) internal ROM, which

is shared by program and resource data. Program, voice and data are shared within

this same 256K words ROM.

5.3

RAM

SNC21085 contains maximum 128 nibble RAM (128 x 4-bits). The 128 nibble RAM is

divided into eight pages (page 0 to page 7, 16 nibble RAM on each page).

In our

programming structure, users can use the instructions, PAGE n (n=0 to 7) to switch

and indicate the RAM page.

Besides, users can use direct mode, M0 ~ M15 in the

data transfer type instructions, to access all 16 nibbles of each page.

5.4

Power Down Mode

“End” instruction makes the IC entering into Stop Mode will stop the system clock for

power savings (<3uA @VDD=3V and <6uA @VDD=4.5V.) Any valid data transition

(L

H or H

L) occurring on any IO pin can be used to start the system clock and

return to normal operating mode.

5.5

Sampling Rate Counter

The unique sampling rate counter is designed in voice channel to be able to play

diverse voices at different sample playing rates. The playing rate can be adaptively set

up among from the wide ranges of 2.5KHz to 20KHz. This architecture yields a

high-quality voice synthesis that sounds very close to its original source when played

through the same amplifier and speaker circuitry.

Ver: 1.0

November 08, 2006

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