6

1137J–USB–01/06

AT43301

2.

Functional Description

2.1

Summary

The Atmel AT43301 USB hub controller chip contains various features that makes it the ideal

solution for very low-cost USB hubs. These features are: on-chip regulator, low-frequency oscil-

lator, bus or self-powered operation, ganged port power switching and global overcurrent

protection. Such a hub can be a stand-alone hub used with portable computers to allow conve-

nient connectivity to standard desktop peripheral devices. Alternatively, the hub can be added to

an existing non-USB peripheral such a keyboard. The AT43301 provides 4 downstream USB

ports and can operate in a self-powered or bus-powered mode.

2.2

USB Ports

The AT43301’s upstream port, Port0, is a full speed port. A 1.5 k

Ω pull-up resistor to the 3.3V

regulator output, CEXT, is required for proper operation. The downstream ports support both

full-speed as well as low-speed devices. 15 k

Ω pull down resistors are required at their inputs.

Full speed signal requirements demand controlled rise/fall times and impedance matching of the

USB ports. To meet these requirements, 22

Ω resistors must be inserted in series between the

USB data pins and the USB connectors.

2.3

Hub Repeater

The Hub Repeater is responsible for port connectivity setup and teardown. It also supports

exception handling such as bus fault detection and recovery, and connect/disconnect detection.

Port0 is the root port and is connected to the root hub or an upstream hub. When a packet is

received at Port0, the AT43301 propagates it to all the enabled downstream ports. Conversely, a

packet from a downstream port is transmitted from Port0.

The AT43301 supports downstream port data signaling at both 1.5 Mb/s and 12 Mb/s. Devices

attached to the downstream ports are determined to be either full speed or low speed depending

which data line (DP or DM) is pulled high. If a port is enumerated as low speed, its output buffers

operate at a slew rate of 75-300 ns, and the AT43301 will not propagate any traffic to that port

unless it is prefaced with a preamble PID. Low speed data following the preamble PID is propa-

gated to both low- and full-speed devices. The AT43301 will enable low-speed drivers within four

full-speed bit times of the last bit of a preamble PID, and will disable them at the end of an EOP.

The upstream traffic from all ports is propagated by Port0 using the full speed 4-20ns slew rate

drivers.

All the AT43301 ports independently drive and monitor their DP and DM pins so that they are

able to detect and generate the ‘J’, ‘K’, and SE0 bus signaling states. Each hub port has single-

ended and differential receivers on its DP and DM lines. The ports’ I/O buffers comply with the

voltage levels and drive requirements as specified in the USB Specifications Rev 1.0.

The Hub Repeater implements a frame timer which is timed by the 12 MHz USB clock and gets

reset every time an SOF token is received from the host.

2.4

Serial Interface Engine

The Serial Interface Engine handles the USB communication protocol. It performs the USB

clock/data separation, the NRZI data encoding/decoding, bit stuffing, CRC generation and

checking, USB packet ID decoding and generation, and data serialization and de-serialization.