Beyond Innovation Technology Co., Ltd.

BIT3713

‘05/12/15

Preliminary

Confidential, for authorized user only

page 4 of 11

B i TEK

DCC

CONTROLLED

December 20, 2005

Pin Description:

Table 1

Pin No.

Symbol

I/O

Descriptions

1

INN

I

The inverting input of the error amplifier.

2

CMP

O

Output of the error amplifier.

3

LOAD

I/O

A switch that connected to the high frequency triangle wave generator.

This switch is closed while the voltage level of ISEN pin is lower than 1.3V.

Once the ISEN pin has become > 1.3V, the switch keeps open no mater the

status of ISEN pin. An external resistor connected here may change the

operation frequency of CTOSC during this switch is open.

4

CTOSC

I/O

An external capacitor connected here decides the frequency of high

frequency PWM controller.

5

TIMER

I/O

With internal reference current and an external capacitor connected here, it

decides the required period of starting and the timing of initialization. The

controller is forced to the reset mode while the voltage level of TIMER is lower

than 0.3V. During reset mode, the current about 60uA will flow into the INN

pin to reduce the output level of the error amplifier CMP to turn off the

controller. The protection function will be enabled after this node is charged

to exceed 2.5V. The output current of this pin is 20uA when the level of

TIMER is lower than 0.3V. The output current becomes 1uA when the level

of TIMER is higher than 0.3V

6

ONOFF

I

The control pin of turning on or off the IC. 1V threshold with an internal 80K

15% ohm pull-low resistor.

7

GND

I/O The ground pin of the device.

8

OUT1

O

The active high output driver.

9

OUT2

O

The active high output driver.

10

VDD

I

The power supply pin of the device.

11

PWMOUT

O

The output pin of the 2

nd low frequency PWM generator. A 2.5V or floating two

state output is provided through this pin. The internal circuit limits the max.

Duty-cycle to about 92%.

12

CTPWM

I/O

With the internal reference current and an external capacitor connected here

can set the operation frequency of the 2

nd low frequency PWM generator with

1.0V ~ 2.5V triangle wave output.

13

PWMDC

I

The 2

nd Low frequency PWM controlling input. A PWM output comes out by

comparing this DC input and the 1.0 ~ 2.5V triangle wave that is generated by

CTPWM.

14

OUTADJ

I

Output adjustment. If a > 2.0 V voltage is detected. A ~ 60uA current will flow

into the INN pin to adjust the output of the error amplifier pin CMP to regulate

the output voltage.

15

ISEN

I

Load detection pin, the abnormal load situation is detected if a less than 1.3V

voltage is continuously kept for 32 cycles of the 2nd low frequency PWM on

this pin.

16

MODSEL

O

To set the output polarity of the 2nd low frequency PWM generator.