BIT3713 datasheet(5/11 Pages) BITEK

5 / 11 page

Beyond Innovation Technology Co., Ltd.

BIT3713

‘05/12/15

Preliminary

Confidential, for authorized user only

page 5 of 11

B i TEK

DCC

CONTROLLED

December 20, 2005

Functional Description:

The Power On Initialization:

BIT3713 is in an initial

state when TIMER pin voltage is less than 0.3V. An

internal current source charges the external capacitor

connected on TIMER pin determines the operation

timing of BIT3713. This current provides about 20uA

when TIMER pin voltage is less than 0.3V, or about 1uA

when TIMER pin voltage is large than 0.3V. Table 2

lists the states of each key features during TIMER pin

voltage is less than 0.3V.

Table 2 BIT3713 initial states

To Set the Operation Frequency of the 1

st High

Frequency PWM Controller:

An external capacitor

CCTOSC pin CTOSC determines the frequency as

equation (1)

The frequency of the 1

st high frequency PWM controller

is:

Or a 100KHz operation PWM control system if an 820pF

capacitor is connected to pin CTOSC. Equation (1) is

valid only when VDD=6V, temperature=30ºC and

frequency

(80K ~ 120K)Hz.

Fig. 1 shows the

relationship between the frequency of the high frequency

PWM and CTOSC capacitance.

The 1

st Latched Off Protection: The ISEN pin may be

used for detecting if the operation is controlled stably

during normal operation. For most of the applications, to

define a staring period in which period no power deliver

to the load side, are necessary.

BIT3713 disable the

latched off function when TIMER pin voltage < 2.5V. If

TIMER >2.5V and ISEN < 1.3V for 32 cycles of the 2

low frequency PWM, BIT3713 will shut down the output

pins, OUT1 and OUT2 until the system is powered on

again. The detail is as bellow:

During TIMER > 2.5V, the system operates normally when

the ISEN > or < than 1.3V. The lathed off function

performs when ISEN has continuously been kept < 1.3V

for 32 cycles of the 2nd low frequency PWM.

The

Output

Adjustment

and

Latched

Off

Protection:

The OUTADJ pin may be used for

detecting if the PWM control system operates normally. An

about 60uA current source will charge the INN pin to

adjust the output of CMP while OUTADJ > 2.0V. The

latched off abnormal protection performs while TIMER >

2.5V.

If TIMER > 2.5V and OUTADJ > 2.0V for 32

cycles of the 1

st high frequency PWM, BIT3713 will shut

down the output pins, OUT1 and OUT2, until the system is

powered on again. The detail is as bellow:

During TIMER > 2.5V, the system operates normally when

the OUTADJ > or < than 2.0V. The lathed off function

performs when OUTADJ has continuously been kept >

2.0V for 32 cycles of the 1st high frequency PWM.

Or, a pulse signal on OUTADJ pin with > 50KHz which

may > 2.0V or < 2.0V. BIT3713 performs latched off

function when TIMER > 2.5V and the pulse signal has

continuously present on OUTADJ pin for 32 cycles of the

st high frequency PWM.

To Set The Frequency Deviation of High Frequency

PWM During Different Loading Condition: A

connected between GND and LOAD resistor may increase

the operation frequency of CTOSC.

An internal switch of

the LOAD pin is closed may be used to change the

frequency of CTOSC before ISEN had been triggered to

larger than 1.3V.

In many cases, the resonance

frequency of the load is varied while the load is changed.

For obtaining the better performance, the operation

frequency of the PWM controller must fit to the resonance

frequency of the load.

The following diagram shows

how the load resistance changes the 100KHz operation

frequency of CTOSC pin.

In above case, CTOSC is

connected by an 820pF capacitor. The normal operation

frequency of high frequency PWM is 100KHz.

If a

different frequency says Fn is the set for normal operation.

In BIT3713, the internal switch of the LOAD pin is frozen

to open status when the ISEN > 1.3V.

Pin Number Pin Name

Status

CTOSC

Normally run

OUT1

Forced to GND level

OUT2

Forced to VDD level

PWMOUT Floating

CTPWM

Normally run

)

..(1

..........

8.2e

CTOSC

HFPWM

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