Data Sheet

AD45335

APPLICATIONS INFORMATION

analog.com

Rev. 0 | 15 of 16

POWER SUPPLY DECOUPLING

RECOMMENDATIONS

On the AD45335, it is recommended to tie all grounds together as

close to the device as possible. If the number of supplies must be

reduced, bring all supplies back separately and make a provision

on the PCB through a link option to drive the AVCC and V+ pins from

the same supply. Decouple all power supplies adequately with 10

µF tantalum capacitors and 0.1 µF ceramic capacitors.

GUIDELINES FOR PCB LAYOUT

Design PCBs such that the analog and digital sections are separat-

ed and confined to the designated analog and digital sections of

the board. This facilitates the use of ground planes that can be

separated easily. A minimum etch technique is generally the best

for ground planes because it optimizes shielding of sensitive signal

lines. Join digital and analog ground planes in one place only, at

the AGND and DGND pins of the high resolution converter. To

isolate the high frequency bus of the processor from the bus of

the high resolution converters, buffer or latch data and address

buses on the board. These act as a Faraday shield and increase

the signal-to-noise performance of the converters by reducing the

amount of high frequency digital coupling. Avoid running digital lines

under the device because they couple noise onto the die. Allow the

ground plane to run under the IC to avoid noise coupling.

Use as large a trace as possible for the supply lines of the device

to provide low impedance paths and reduce the effects of glitches

on the power supply line. Shield components, such as clocks with

fast-switching signals, with digital ground to avoid radiating noise to

other sections of the board. Never run clock signals near the analog

inputs of the device. Avoid crossovers of digital and analog signals.

Keep traces for analog inputs as wide and short as possible and

shield with analog ground if possible. Run traces on opposite sides

of the 2-layer PCB at right angles to each other to reduce the

effects of feedthrough through the board.

A microstrip technique is by far the best, but it is not always

possible to use with a double-sided board. In this technique,

the component side of the board is dedicated to ground planes,

and signals are placed on the solder side. Multilayer PCBs with

dedicated ground, power, and tracking layers offer the optimum

solution in terms of obtaining analog performance, but at increased

manufacturing costs.

Good decoupling is vitally important when using high resolution

converters. Decouple all analog supplies with 10 µF tantalum ca-

pacitors in parallel with 0.1 µF ceramic capacitors to analog ground.

To achieve the best results from the decoupling components, place

them as close to the device as possible, ideally right up against the

IC or the IC socket. The main aim of a bypassing element is to

maximize the charge stored in the bypass loop while simultaneous-

ly minimizing the inductance of this loop. Inductance in the loop

acts as an impedance to high frequency transients and results in

power supply spiking. By keeping the decoupling as close to the

device as possible, the loop area is kept as small as possible,

thereby reducing the possibility of power supply spikes. Decouple

digital supplies of high resolution converters with 10 µF tantalum

capacitors and 0.1 µF ceramic capacitors to the digital ground

plane. Decouple the V+ supply with a 10 µF tantalum capacitor and

a 0.1 µF ceramic capacitor to AGND.

Decouple all logic chips with 0.1 µF ceramic capacitors to digital

ground to decouple high frequency effects associated with digital

circuitry.