TLV1811 datasheet(26/46 Pages) TI1

26 / 46 page

10M

470 k

0.01 F

Output

VREF

VIN

Figure 9-18. Pulse Slicer

For this design, follow these design requirements:

• The RC constant value (R2 and C1) must support the targeted data rate to maintain a valid tripping threshold.

• The hysteresis introduced with R2 and R43 helps to avoid spurious output toggles.

The TLV182x may also be used, but with the addition of a pull-up resistor on the output (not shown for clarity).

Figure 9-19 shows the results of a 9600 baud data signal riding on a varying baseline.

OUT

REF

1.8 V

1.2 V

4.0 V

0.0 V

1.61 V

1.58 V

Time

0.0

200.0 u

400.0 u

600.0 u

800.0 u

Figure 9-19. Pulse Slicer Waveforms

9.3 Power Supply Recommendations

Due to the fast output edges, it is critical to have bypass capacitors on the supply pin to prevent supply ringing

and false triggers and oscillations. Bypass the supply directly at each device with a low ESR 0.1 µF ceramic

bypass capacitor directly between VCC pin and ground pins. Narrow, peak currents will be drawn during the

output transition time, particularly for the push-pull output device. These narrow pulses can cause un-bypassed

supply lines and poor grounds to ring, possibly causing variation that can eat into the input voltage range and

create an inaccurate comparison or even oscillations.

The device may be powered from both "split" supplies (V+ and V-), or "single" supplies (V+ and GND), with GND

applied to the V- pin. Input signals must stay within the specified input range (between V+ and V-) for either type.

Note that with a "split" supply the ouptut will now swing "low" (VOL) to V- potential and not GND.

9.4 Layout

9.4.1 Layout Guidelines

For accurate comparator applications it is important maintain a stable power supply with minimized noise and

glitches. Output rise and fall times are in the tens of nanoseconds, and should be treated as high speed logic

devices. The bypass capacitor should be as close to the supply pin as possible and connected to a solid ground

plane, and preferably directly between the VCC and GND pins.

TLV1811, TLV1821, TLV1812, TLV1822, TLV1814, TLV1824

SNOSDC8C – SEPTEMBER 2022 – REVISED SEPTEMBER 2023

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