USB97C201 datasheet(27/59 Pages) SMSC

27 / 59 page

SMSC USB97C201

Page 27

Rev. 11-05-03

DATASHEET

Table 19 – SRAM Address Register 1

SRAM_ADD1

(A1 RESET=0x00)

SRAM ADDRESS REGISTER 1

BIT

NAME

R/W

DESCRIPTION

[7:0]

SRAM_ADD

[7:0]

R/W

This register contains lower bits

of the address in the buffer

RAM that the SRAM_DATA

Table 20 – SRAM Address Register 2

SRAM_ADD2

(0XA2- RESET=0x00)

SRAM ADDRESS REGISTER 2

BIT

NAME

R/W

DESCRIPTION

[7:3]

Reserved

These bits always read “0”.

[2:0]

SRAM_ADD

[10:8]

R/W

This register contains upper bits

of the address in the buffer

RAM that the SRAM_DATA

Note: These registers will auto increment upon each read or write to the SRAM_DATA register.

6.1.4.3

MCU Power Management Registers

Table 21 - MCU Clock Source Select

CLOCK_SEL

(0XA5 - RESET=0x40)

MCU CLOCK SOURCE SELECT

BIT

NAME

R/W

DESCRIPTION

SLEEP

R/W

When PCON. 0 = 1 and SLEEP has been set to 1, the ring

oscillator will be gated off, then all oscillators will be turned

off for maximum power savings.

ROSC_EN

R/W

0 = Ring Oscillator Disable.

1 = Ring Oscillator Enable. ROSC_EN must be set to 1

before the MCU can be switched to the internal Ring

Oscillator Clock source.

MCUCLK_SRC

R/W

MCUCLK_SRC overrides MCUCLK_x clock select and

switches the MCU to the Ring Oscillator.

0 = Use Ring Oscillator. ROSC_EN must be enabled by the

MCU first.

1 = Use clock specified in MCU_CLK_[1:0]

[4:3]

MCU_CLK[1:0]

R/W

[4:3] = 00: 3.75MHz

[4:3] = 01: 7.5MHz

[4:3] = 10: 15MHz

[4:3] = 11: 30MHz

CLKVALID

Reflects the state of the PHY CLKVALID signal. When 1,

indicates that the internal clocks are stable and can be

used instead of the ring oscillator. After restarting the

clocks with the SUSPEND bit in the SIE_CONF register,

the code should wait 50us before polling this bit. This bit is

polled until it reads a “1” to see if the clocks are settled

before accessing any other non 8051 registers.

1:0]

Reserved

Always reads “0”.

Note 1: The 8051 may program itself to run off of an internal Ring Oscillator having a frequency range between 8 and

24MHz. This is not a precise clock, but is meant to provide the 8051 with a clock source, without running the

30MHz crystal oscillator or the PLL

Note 2: Switching between fast and slow clocks is recommended to save power.

Note 3: Clock switching can be done on the fly as long as both clocks are running. When switching, it takes a total of six

clocks (3 clocks of the original clock plus 3 clocks of the switching clock) to guarantee the switching.

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