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MB2823 Datasheet(PDF) 5 Page - NXP Semiconductors

Part # MB2823
Description  Dual 9-bit D-type flip-flop with reset and enable 3-State
PDF  10 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

MB2823 Datasheet(HTML) 5 Page - NXP Semiconductors

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Philips Semiconductors Advanced BiCMOS Products
Product specification
MB2823
Dual 9-bit D-type flip-flop with
reset and enable (3-State)
August 24, 1993
6
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = +25oC
VCC = +5.0V
Tamb = -40 to +85oC
VCC = +5.0V ±0.5V
UNIT
MIN
TYP
MIN
ts(H)
ts(L)
Setup time, High or Low
nDx to nCP
3
2.0
1.5
0.6
0.2
2.0
1.5
ns
th(H)
th(L)
Hold time, High or Low
nDx to nCP
3
1.5
1.5
–0.2
–0.5
1.5
1.5
tw(H)
tw(L)
nCP pulse width
High or Low
1
3.0
3.5
1.0
2.3
3.0
3.5
ns
ts(H)
ts(L)
Setup time, High or Low
nCE to nCP
3
1.5
2.0
–0.2
1.0
1.5
2.0
ns
th(H)
th(L)
Hold time, High or Low
nCE to nCP
3
1.5
1.5
–1.2
0.3
1.5
1.5
ns
tw(L)
nMR pulse width, Low
2
3.0
1.6
3.0
ns
trec
Recovery time
nMR to nCP
2
2.5
0.6
2.5
ns
AC WAVEFORMS
NOTE: For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
tw(H)
tw(L)
VM
VM
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
VM
VM
VM
1/fMAX
tPHL
tPLH
nCP
nQx
VM
nMR
V
M
nQx
Waveform 2. Master Reset Pulse WIdth, Master Reset to
Output Delay and Master Reset to Clock Recovery Time
tw(L)
VM
tPHL
VM
tREC
nCP
VM
nDx, nCE
VM
VM
VM
VM
VM
nCP
Waveform 3. Data Setup and Hold Times
ts(H)
th(H)
ts(L)
th(L)
nOE
VM
tPZH
tPHZ
0V
VOH –0.3V
nQx
Waveform 4. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
VM
VM
nOE
tPZL
tPLZ
VOL +0.3V
nQx
Waveform 5. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
VM
VM
VM



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