USB3250 datasheet(26/48 Pages) SMSC

26 / 48 page

USB2.0 PHY IC

Datasheet

Revision 1.5 (03-24-06)

SMSC GT3200, SMSC USB3250

DATASHEET

7.4

TX Logic

This block receives parallel data bytes placed on the DATA bus and performs the necessary transmit

operations. These operations include parallel to serial conversion, bit stuffing and NRZI encoding.

Upon valid assertion of the proper TX control lines by the SIE and TX State Machine, the TX LOGIC

block will synchronously shift, at either the FS or HS rate, the data to the FS/HS TX block to be

transmitted on the USB cable. Data transmit timing is shown in Figure 7.4.

Figure 7.4 Transmit Timing for a Data Packet (8-bit mode)

Figure 7.5 Transmit Timing for 16-bit Data, Even Byte Count

PID

DATA

SYNC

DATA

CRC

EOP

DATA DATA DATA

CRC

DATA

PID

CLK60

TXVALID

TXDATA[7:0]

TXREADY

DP/DM

CLK30

DATA[7:0]

TXREADY

TXVALID

DP/DM

PID

DATA

SYNC

DATA

CRC

PID

DATA[15:8]

DATA (0)

DATA (1)

DATA (2)

DATA (3)

DATA (4)

CRC (HI)

VALIDH

CRC (LO)

EOP

USB3250 Datasheet(PDF) 26 Page - SMSC Corporation

USB3250 Datasheet(HTML) 26 Page - SMSC Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Download

Link URL