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COM20051 Datasheet(PDF) 8 Page - SMSC Corporation |
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COM20051 Datasheet(HTML) 8 Page - SMSC Corporation |
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8 / 82 page ![]() 8 8 oscillator, pin 21 (XTAL1) functions as the clock input. Emulate Mode The COM20051 contains a unique feature called the Emulate mode that most 8051-based peripheral devices do not accommodate. TheEmulate mode permits developers to access and program the internal ARCNET core using a standard low-cost 8032 emulator. This feature eliminates the need for expensive dedicated development equipment needed for other types of 8051-based peripheral devices. The Emulate mode is invoked by connecting the nEA pin to VCC. This causes the internal 80C32 processor to enter a HI-Z state and changes the state of the COM20051 pins according to the following table: Table 1 - Emulate Mode SIGNAL NAME EMUL = 0 EMUL = 1 PORT 0 Bidirectional Bidirectional PORT 1 Bidirectional HI-Z (except for pins designated as interrupt destinations) PORT 2 Output Input INT0,1 (P3.2, P3.3) Input Output RD/WR (P3.6, P3.7) Output Input ALE Output Input TX,T0, T1 (P3.1,3.4,3.5) nPSEN Output HI-Z Address Decoding The COM20051, as described previously, maps the ARCNET registers into the 80C32's External Data Memory space. This provides system flexibility because the location of the ARCNET registers can be located anywhere within the 64K External Data Memory space. The precise location can be resolved with a 256-byte page. The location of that page in the External Data Memory space is pointed to by the read/write Address Decode Register, as shown in Figure 2. The Address Decode Register is located at FFFFh of the External Data Memory space. It holds the upper 8 bits of the 16-bit address at which the 256 page boundary will start. This register must be programmed prior to any access to the ARCNET core. The default value is 0000h. The ARCNET core register page must be mapped away from the external RAM prior to any access to the external RAM by the software. Failure to do this may result in incorrect data write and read operations to the external RAM as well as the core registers. |
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