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NE591 Datasheet(PDF) 2 Page - NXP Semiconductors |
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NE591 Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 9 page ![]() Philips Semiconductors Linear Products Product specification NE590/591 Addressable peripheral drivers August 31, 1994 519 PIN DESIGNATION 590 PIN NO. 591 PIN NO. SYMBOL NAME & FUNCTION 1-3 2-4 A0-A2 A 3-bit binary address on these pins defines which of the 8 output latches is to receive the data. 4-7, 9-12 5-8, 11-14 Q0-Q7 The 8 device outputs. The NE590 has open-collector Darlington outputs. The NE591 has open emit- ter-follower outputs. 13 15 D The data input. When the chip is enabled, this data bit is transferred to the defined output such that: “1” turns output switch “ON” “0” turns output switch “OFF” Thus in logic terms, the NE590 inverts data to the relevant output. The NE591 retains true data at the output. 14 16 CE The chip enable. When this input is low, the output latches will accept data. When CE goes high, all outputs will retain their existing state regardless of address or data input conditions. 15 17 CLR The clear input. When CLR goes low all output switches are turned “OFF”. On the NE590, a high data input will override the clear function on the addressed latch. On the NE591, CLR low will over- ride any other condition. - 1 CS The chip select input provides for an additional level of address decoding. - 10 VS The VS line provides the power to all 8 output devices. It is connected to the collectors of all 8 output transistors. This pin may be connected to the VCC or another supply. BLOCK DIAGRAM LATCH LATCH LATCH LATCH LATCH LATCH LATCH LATCH CLR CE A0 A1 A2 D 1–OF–8 DECODER COMTROL GATE VCC NE590 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 cs (NE51 ONLY) INPUT STAGE NE591 OUTPUT STAGE |
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