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OPA2832 Datasheet(PDF) 23 Page - Burr-Brown (TI) |
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OPA2832 Datasheet(HTML) 23 Page - Burr-Brown (TI) |
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23 / 32 page ![]() www.ti.com DESIGN-IN TOOLS DEMONSTRATION FIXTURES DRIVING CAPACITIVE LOADS MACROMODEL AND APPLICATIONS OPERATING SUGGESTIONS OUTPUT CURRENT AND VOLTAGES OPA3832 SBOS370 – DECEMBER 2006 steady-state operation, the available output voltage and current will always be greater than that shown in the over-temperature specifications, because the output stage junction temperatures will be higher Two printed circuit boards (PCBs) are available to than the minimum specified operating ambient. assist in the initial evaluation of circuit performance To maintain maximum output stage linearity, no using the OPA3832 in its two package options. Both output short-circuit protection is provided. This of these are offered free of charge as unpopulated configuration will not normally be a problem, since PCBs, delivered with a user's guide. The summary most applications include a series matching resistor information for these fixtures is shown in Table 1. at the output that will limit the internal power dissipation if the output side of this resistor is shorted Table 1. Demonstration Fixtures by Package to ground. However, shorting the output pin directly ORDERING LITERATURE to the adjacent positive power-supply pin (8-pin PRODUCT PACKAGE NUMBER NUMBER packages) will, in most cases, destroy the amplifier. OPA3832ID SO-14 DEM-OPA-SO-3B SBOU018 If additional short-circuit protection is required, OPA3832IPW TSSOP-14 DEM-OPA-SSOP-3B SBOU019 consider a small series resistor in the power-supply leads. This resistor will reduce the available output The demonstration fixtures can be requested at the voltage swing under heavy output loads. Texas Instruments web site (www.ti.com) through the OPA3832 product folder. One of the most demanding and yet very common SUPPORT load conditions for an op amp is capacitive loading. Often, the capacitive load is the input of an Computer simulation of circuit performance using Analog-to-Digital Converter (ADC)—including SPICE is often a quick way to analyze the additional external capacitance which may be performance of the OPA3832 and its circuit designs. recommended to improve ADC linearity. A This is particularly true for video and RF amplifier high-speed, high open-loop gain amplifier like the circuits where parasitic capacitance and inductance OPA3832 can be very susceptible to decreased can play a major role on circuit performance. A stability and closed-loop response peaking when a SPICE model for the OPA3832 is available through capacitive load is placed directly on the output pin. the TI web page (www.ti.com). The applications When the primary considerations are frequency department is also available for design assistance. response flatness, pulse response fidelity, and/or These models predict typical small signal ac, distortion, the simplest and most effective solution is transient steps, dc performance, and noise under a to isolate the capacitive load from the feedback loop wide variety of operating conditions. The models by inserting a series isolation resistor between the include the noise terms found in the electrical amplifier output and the capacitive load. specifications of the data sheet. These models do not attempt to distinguish between the package types The Typical Characteristic curves show the in their small-signal ac performance. recommended RS versus capacitive load and the resulting frequency response at the load. Parasitic capacitive loads greater than 2pF can begin to degrade the performance of the OPA3832. Long PCB traces, unmatched cables, and connections to multiple devices can easily exceed this value. Always The OPA3832 provides outstanding output voltage consider this effect carefully, and add the capability. For the +5V supply, under no-load recommended series resistor as close as possible to conditions at +25 °C, the output voltage typically the output pin (see the Board Layout Guidelines swings closer than 90mV to either supply rail. section). The minimum specified output voltage and current The criterion for setting this RS resistor is a maximum specifications over temperature are set by bandwidth, flat frequency response at the load. For a worst-case simulations at the cold temperature gain of +2, the frequency response at the output pin extreme. Only at cold startup will the output current is already slightly peaked without the capacitive load, and voltage decrease to the numbers shown in the requiring relatively high values of RS to flatten the ensured tables. As the output transistors deliver response at the load. Increasing the noise gain will power, the junction temperatures will increase, also reduce the peaking. decreasing the VBEs (increasing the available output voltage swing) and increasing the current gains (increasing the available output current). In 23 Submit Documentation Feedback |
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