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AM2732 Datasheet(PDF) 24 Page - Texas Instruments |
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AM2732 Datasheet(HTML) 24 Page - Texas Instruments |
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24 / 114 page ![]() Table 5-1. Pin Attributes (ZCE, NZN Packages) (continued) ZCE Ball Number NZN Ball Number Ball Name Signal Name Pin Control Register Pin Control Address MUX Mode Signal Type DSIS Ball State During Reset Ball State After Reset Mux Mode After Reset I/O Voltage Power Domain Hysteresi s Pull Type Buffer Type C15 B7 NERRORIN_FE1 MSS_GPIO_16 PADDU_ CFG_RE G 0x020C 0188 0 IO Pad Off / Off / Off Off / Off / Down 1 1.8V/3.3V VIOIN Yes PU/PD (PD) LVCMOS RCSS_MCASPA_DAT10 7 IO Pad RCSS_MCASPA_DAT2 8 IO Pad RCSS_GPIO_48 12 IO Pad A16 C7 NERRORIN_FE2 MSS_GPIO_17 PADDV_ CFG_RE G 0x020C 018C 0 IO Pad Off / Off / Off Off / Off / Down 1 1.8V/3.3V VIOIN Yes PU/PD (PD) LVCMOS RCSS_MCASPA_DAT11 7 IO Pad RCSS_MCASPA_DAT3 8 IO Pad RCSS_GPIO_49 12 IO Pad L3 H2 NERROR_IN NERROR_IN PADAR_ CFG_RE G 0x020C 0044 0 I Pad Off / Off / Off Off / NA / Up 0 1.8V/3.3V VIOIN Yes Pull Disabled LVCMOS L1 H1 NERROR_OUT NERROR_OUT PADAT_C FG_REG 0x020C 004C 0 IO Pad Off / Off / Off Off / NA / Off 0 1.8V/3.3V VIOIN Yes Pull Disabled LVCMOS L2 J3 NRESET NRESET 0 I 1.8V/3.3V VIOIN Yes PU/PD LVCMOS B15 B6 NRESET_FE1 MSS_GPIO_18 PADDW_ CFG_RE G 0x020C 0190 0 IO Pad Off / Off / Off Off / Off / Down 1 1.8V/3.3V VIOIN Yes PU/PD (PD) LVCMOS RCSS_MCASPA_DAT12 7 IO Pad RCSS_MCASPA_DAT4 8 IO Pad RCSS_GPIO_50 12 IO Pad A15 A6 NRESET_FE2 MSS_GPIO_19 PADDX_ CFG_RE G 0x020C 0194 0 IO Pad Off / Off / Off Off / Off / Down 1 1.8V/3.3V VIOIN Yes PU/PD (PD) LVCMOS RCSS_I2CA_SDA 3 IO Pad RCSS_MCASPA_DAT13 7 IO Pad RCSS_MCASPA_DAT5 8 IO Pad RCSS_GPIO_51 12 IO Pad B14 B5 NWARMRESET_IN_FE1 MSS_GPIO_20 PADDY_ CFG_RE G 0x020C 0198 0 IO Pad Off / Off / Off Off / Off / Down 1 1.8V/3.3V VIOIN Yes PU/PD (PD) LVCMOS RCSS_I2CA_SCL 3 IO Pad RCSS_MCASPA_DAT14 7 IO Pad RCSS_MCASPA_DAT6 8 IO Pad RCSS_GPIO_52 12 IO Pad C13 A5 NWARMRESET_IN_FE2 MSS_GPIO_21 PADDZ_ CFG_RE G 0x020C 019C 0 IO Pad Off / Off / Off Off / Off / Down 1 1.8V/3.3V VIOIN Yes PU/PD (PD) LVCMOS RCSS_ECAPA_CAPIN_PWMO 4 IO Pad RCSS_MCASPA_DAT15 7 IO Pad RCSS_MCASPA_DAT7 8 IO Pad RCSS_GPIO_53 12 IO Pad T4 R2 OSC_CLK_OUT_AUDIO OSCCLKOUT 0 O 1.8V VIN_18C LK Clock Subsyste m Output AM2732, AM2732-Q1 SWRS245B – DECEMBER 2021 – REVISED DECEMBER 2023 www.ti.com 24 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: AM2732 AM2732-Q1 |
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