| Electronic Components Datasheet Search |
|
AM2732 Datasheet(PDF) 60 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
AM2732 Datasheet(HTML) 60 Page - Texas Instruments |
|
60 / 114 page ![]() A non-crystal oscillator can also be used as the clock reference source. In this case the signal is fed to the CLKP pin only and CLKM is grounded. Table 6-11 lists the electrical, AC timing, and phase noise requirements of the external oscillator input signal. Table 6-11. External Clock Mode Input Requirements PARAMETER SPECIFICATION UNIT MIN TYP MAX Input Clock: External AC-coupled sine wave or DC- coupled square wave Phase Noise referrenced to 40 MHz Frequency 40 MHz AC-Amplitude 700 1200 mV (pp) DC-VIL 0.00 0.02 V DC-VIH 1.40 1.95 V DC-trise/fall 10 ns Phase Noise at 1 kHz –132 dBc/Hz Phase Noise at 10 kHz –143 dBc/Hz Phase Noise at 100 kHz –152 dBc/Hz Phase Noise at 1 MHz –153 dBc/Hz Duty Cycle 35 65 % Freq Tolerance –50 50 ppm 6.12.3 Peripheral Information Initial peripheral descriptions and features are provided in the following sections. Additional peripheral details and interface timing information shall be provided in a later product preview or datasheet release. 6.12.3.1 QSPI Flash Memory Peripheral AM273x includes a Quad-Serial Peripheral Interface for external flash memory access. Flash memory can be be utilized for many purposes including: Secondary boot-loader memory, application program memory, security keys storage, and long-term data logs for security and error conditions. • ROM bootloader auto identification of supported flash through flash device ID (DEVID) register • Loopback skew cancellation for clock signal to supported faster flash interface clock rates • Two chip-select signals to connect two external flash devices • Memory mapped 'direct' mode and software triggered 'indirect' mode of operation for performing flash data transfers • 67 MHz operating clock supported 6.12.3.1.1 QSPI Timing Conditions SPECIFIC ATION NUMBER PARAMETER MIN TYP MAX UNIT Input Conditions 1 tR Input rise time 1 3 ns 2 tF Input fall time 1 3 ns Output Conditions 3 CLOAD Output load capacitance 2 15 pF 6.12.3.1.2 QSPI Timing Requirements SPECIFIC ATION NUMBER PARAMETER (1), (2), (3) MIN TYP MAX UNIT Q12 tsu(D-SCLK) Setup time, D[3:0] valid before falling SCLK edge 5 ns Q13 th(SCLK-D) Hold time, D[3:0] valid after falling SCLK edge 0 ns AM2732, AM2732-Q1 SWRS245B – DECEMBER 2021 – REVISED DECEMBER 2023 www.ti.com 60 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: AM2732 AM2732-Q1 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |