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AD9937KCPRL Datasheet(PDF) 23 Page - Analog Devices |
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AD9937KCPRL Datasheet(HTML) 23 Page - Analog Devices |
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23 / 44 page ![]() REV. 0 AD9937 –23– Table VIII. RS, H1, SHP, SHD, and DOUTPHASE Timing Parameters Bit Width Register Name * (Bits) Register Type Range Description RSPOSLOC 6 Control (Addr 0x06) 0–47 Edge Location Falling Edge Location for RS RSNEGLOC 6 Control (Addr 0x06) 0–47 Edge Location Falling Edge Location for RS H1POSLOC 6 Control (Addr 0x06) 0–47 Edge Location Positive Edge Location for H1 H1NEGLOC 6 Control (Addr 0x06) 0–47 Edge Location Negative Edge Location for H1 SHPLOC 6 Control (Addr 0x05) 0–47 Edge Location Sample Location for SHP SHDLOC 6 Control (Addr 0x05) 0–47 Edge Location Sample Location for SHD DOUTPHASE 6 Control (Addr 0x05) 0–47 Edge Location Phase Location of Data Output [9:0] *The 2 MSB bits are used to select the quadrant. Table IX. Precision Timing Edge Locations for RS, H1, SHP, SHD, and DOUTPHASE Quadrant RS Rising Edge RS Falling Edge Signal Name (Range) RSPOSLOC RSNEGLOC RS I P[0] to P[11] 000000 to 001011 000000 to 001011 II P[12] to P[23] 010000 to 011011 010000 to 011011 III P[24] to P[35] 100000 to 101011 100000 to 101011 IV P[36] to P[47] 110000 to 111011 110000 to 111011 Quadrant H1 Rising Edge H1 Falling Edge Signal Name (Range) H1POSLOC H1NEGLOC H1 I P[0] to P[11] 000000 to 001011 000000 to 001011 II P[12] to P[23] 010000 to 011011 010000 to 011011 III P[24] to P[35] 100000 to 101011 100000 to 101011 IV P[36] to P[47] 110000 to 111011 110000 to 111011 Quadrant CDS (SHP) Rising Edge CDS (SHD) Falling Edge Signal Name (Range) SHPLOC SHDLOC CDS (Internal) I P[0] to P[11] 000000 to 001011 000000 to 001011 II P[12] to P[23] 010000 to 011011 010000 to 011011 III P[24] to P[35] 100000 to 101011 100000 to 101011 IV P[36] to P[47] 110000 to 111011 110000 to 111011 Quadrant DOUT Rising Edge DOUT Falling Edge Signal Name (Range) DOUTPHASE (Not Programmable) Data Output[9:0] I P[0] to P[11] 000000 to 001011 DOUTPHASE + 24 Steps II P[12] to P[23] 010000 to 011011 DOUTPHASE + 24 Steps III P[24] to P[35] 100000 to 101011 DOUTPHASE + 24 Steps IV P[36] to P[47] 110000 to 111011 DOUTPHASE + 24 Steps |
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