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PCD5041 Datasheet(PDF) 20 Page - NXP Semiconductors

Part # PCD5041
Description  DECT burst mode controller
PDF  28 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

PCD5041 Datasheet(HTML) 20 Page - NXP Semiconductors

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1996 Oct 31
20
Philips Semiconductors
Objective specification
DECT burst mode controller
PCD5041
Notes to the characteristics
1. VDD = 3.0 V; fclk =13.824 MHz; no external load; one speech link active (under typical conditions).
2. VDD = 3.0 V; fclk =13.824 MHz; no external load; after reset.
3. Maximum differential non-linearity at supply voltage 5.5 V and VREF =1V.
4. Supply current IDD(stb)(comp) flows when COMP_NE is HIGH.
Supply current IDD(idle)(comp) flows when the comparator is in active mode (COMP_NE is LOW). It is the DC current
of the comparator when it is not switching, and V(COMP_INP) < V(COMP_INM).
The active mode supply current IDD(1MHz) includes the output pulse rate of 1 MHz.
5. For input pins COMP_INP, COMP_INM, COMP_NE.
6. For input pin COMP_NE.
7. The minimum input common mode voltage will be measured at DC levels with, COMP_INM at 1 V DC
±30 mV.
The same goes for the maximum input common mode voltage at (VDD − 0.5V).
8. These values are not tested in production, and are based upon theoretical estimates and laboratory tests.
9. The propagation delay tpd is measured from the time the differential input voltage equals the offset voltage, to the
50% point of the output transition. The initial differential input voltage is 100 mV and the propagation delay is
specified for an input overdrive of 30 mV, and a load capacitance of 50 pF. tpd is valid for both the positive and
negative going output transition. The maximum value is valid for the total ranges of temperature, supply voltage and
common mode input voltage. The worst case operation conditions are at the minimum supply voltage, the lowest
operating temperature and the minimum input common mode voltage. The delay difference
∆tpd gives the difference
between tpd for the rising output transition and tpd for the falling output transition and is valid for all operating
conditions. The test method to check the maximum delay difference is by measuring the RMS voltage of the output
signal.



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