6 Specifications

6.1 Absolute Maximum Ratings

Over free-air temperature range unless otherwise noted(1)

MIN

MAX

UNIT

Supply voltage

V+

–0.3

6

V

Input/Output voltage

SCL, SDA, ADD0, ALERT

–0.3

6

V

Output current

±10

mA

Operating temperature, TA

–40

125

°C

Junction temperature, TJ

150

°C

Storage temperature, Tstg

–55

150

°C

(1)

Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply

functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.

If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully

functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

V

Charged-device model (CDM), per JEDEC specification JESD22-C101(2)

±500

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN

NOM

MAX

UNIT

V+

Supply voltage

1.14

3.3

5.5

V

VI/O

SCL, SDA, ADD0, ALERT

0

5.5

V

IOL

SDA, ALERT

0

3

mA

TA

Operating ambient temperature

-40

125

°C

6.4 Thermal Information

THERMAL METRIC(1)

TMP110

UNIT

DPW

5-pins

RθJA

Junction-to-ambient thermal resistance

230

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

194

°C/W

RθJB

Junction-to-board thermal resistance

158.4

°C/W

ΨJT

Junction-to-top characterization parameter

20

°C/W

ΨJB

Junction-to-board characterization parameter

158.3

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

108.4

°C/W

MT

Thermal Mass

TBD

mJ/°C

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

note.

TMP110

SNIS233 – FEBRUARY 2024

www.ti.com

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