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4901A–RKE–11/05

ATA3745

5.5.1

Conservation of the Register Information

The ATA3745 has integrated power-on reset and brown-out detection circuitry to provide a

mechanism to preserve the RAM register information.

According to Figure 5-13, a power-on reset (POR) is generated if the supply voltage V

below the threshold voltage V

tion registers in that condition. Once V

minimum reset period t

turned on.

To indicate that condition, the receiver displays a reset marker (RM) at pin DATA after a reset.

The RM is represented by the fixed frequency f

an "L" pulse t1 at pin DATA. The RM implies the following characteristics:

•f

misinterpreted by the connected microcontroller.

• If the receiver is set back to polling mode via pin DATA, RM cannot be canceled by accident if

t1 is applied according to the proposal in “Programming the Configuration Register” on page

22.

By means of that mechanism, the receiver cannot lose its register information without communi-

cating that condition via the reset marker RM.

Figure 5-13. Generation of the Power-on Reset

Figure 5-14. Timing of the Register Programming

V

S

POR

DATA (ATA3745)

X

V

ThReset

t

Rst

1/f

RM

Out1 (microcontroller)

DATA (ATA3745)

Serial bi-directional

data line

X

Bit 1

("0")

(Start bit)

Bit 2

("1")

(Register

select)

Bit 13

("0")

(Poll8)

Bit 14

("1")

(Poll8R)

X

t1

t2

t3

t4

t5

t6

t8

t7

X

X

Programming Frame

Receiver

on

Startup

mode

t9

T

Sleep