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56F8345 Datasheet(PDF) 101 Page - Freescale Semiconductor, Inc |
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56F8345 Datasheet(HTML) 101 Page - Freescale Semiconductor, Inc |
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101 / 164 page  Register Descriptions 56F8345 Technical Data, Rev. 17 Freescale Semiconductor 101 Preliminary 5.6.22.1 IRQ Pending (PENDING)—Bits 80–65 This register combines with the other five to represent the pending IRQs for interrupt vector numbers 2 through 81. • 0 = IRQ pending for this vector number • 1 = No IRQ pending for this vector number 5.6.23 IRQ Pending 5 Register (IRQP5) Figure 5-25 IRQ Pending Register 5 (IRQP5) 5.6.23.1 Reserved—Bits 96–82 This bit field is reserved or not implemented. The bits are read as 1 and cannot be modified by writing. 5.6.23.2 IRQ Pending (PENDING)—Bit 81 This register combines with the other five to represent the pending IRQs for interrupt vector numbers 2 through 81. • 0 = IRQ pending for this vector number • 1 = No IRQ pending for this vector number 5.6.24 Reserved—Base + 17 5.6.25 Reserved—Base + 18 5.6.26 Reserved—Base + 19 5.6.27 Reserved—Base + 1A 5.6.28 Reserved—Base + 1B 5.6.29 Reserved—Base + 1C Base + $16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 PEND- ING [81] Write RESET 1 1 1 1 1 111 11 11 11 1 1 |
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