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PR31700 Datasheet(PDF) 13 Page - NXP Semiconductors |
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PR31700 Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 36 page ![]() Philips Semiconductors Preliminary specification PR31700 32-bit RISC microprocessor 1998 May 13 13 PIN USAGE INFORMATION This section contains tables summarizing various aspects of the pin usage for the PR31700. Table 1 lists the standard versus multi-function usage for each PR31700 pin, if applicable. Those signal names shown in parentheses are test signals for debugging purposes only. The column showing the multi-function select signal and reset state indicates the internal control signal used to select the multi-function mode, as well as the default configuration of each multi-function pin during reset. The ”Bus Arb State” column shows which pins are tri-stated whenever the DGRNT* signal is asserted in response to a DREQ*(external bus arbitration request). Table 1. PR31700 Standard and Multi-Function Pin Usage PR31700 pin Standard Function (I = input, O = output) Multi-function Multi-function select (Reset State: 1 = multi-function mode selected; 0 = standard function & mode selected) Bus Arb State D[31:0] D[31:0] (I/O) Hi-Z A[12:0] A[12:0] (I/O) ALE ALE (O) Hi-Z RD* RD* (O) Hi-Z WE* WE* (O) Hi-Z CAS0* (WE0*) CAS0* (O) Hi-Z CAS1* (WE1*) CAS1* (O) Hi-Z CAS2* (WE2*) CAS2* (O) Hi-Z CAS3* (WE3*) CAS3* (O) Hi-Z RAS0* RAS0* (O) Hi-Z RAS1* (DCS1*) RAS1* (O) Hi-Z DCS0* DCS0* (O) Hi-Z DCKE DCKE (O) Hi-Z DCLKIN DCLKIN (I) DCLKOUT DCLKOUT (O) Hi-Z DQMH DQMH (O) Hi-Z DQML DQML (O) Hi-Z DREQ* DREQ* (I) MIO[27] MIOSEL[27] (0) DGRNT* DGRNT* (O) MIO[26] MIOSEL[26] (0) SYSCLKIN SYSCLKIN (I) SYSCLKOUT SYSCLKOUT (O) C32KlN C32KIN (I) C32KOUT C32KOUT (O) BC32K BC32K(O) MIO[25] MIOSEL[25] (1) VDAT[3] VDAT[3] (O) (BERR) IRQTEST (0) VDAT[2] VDAT[2] (O) VDAT[1] VDAT[1] (O) (IRQHIGH) IRQTEST (0) VDAT[0] VDAT[0] (O) (IRQLow) IRQTEST (0) CP CP (O) LOAD LOAD (O) DF DF (O) FRAME FRAME (O) |
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